Date: Sun, 5 Jun 2016 05:55:27 +0000 (UTC) From: Adrian Chadd <adrian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r301423 - head/sys/contrib/dev/ath/ath_hal/ar9300 Message-ID: <201606050555.u555tR6V037068@repo.freebsd.org>
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Author: adrian Date: Sun Jun 5 05:55:27 2016 New Revision: 301423 URL: https://svnweb.freebsd.org/changeset/base/301423 Log: [ath_hal] add AR9462 (jupiter) RX gain / XLNA programming. This seems to make 5G work better. It doesn't fix powersave handling though, that still sees the PHY get stuck during initial calibration and everything goes pear shaped. I'll look into that later. Tested: * QCAFN222 NIC, STA mode, 5GHz Obtained from: Linux ath9k Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h ============================================================================== --- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h Sun Jun 5 05:49:33 2016 (r301422) +++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300.h Sun Jun 5 05:55:27 2016 (r301423) @@ -635,6 +635,10 @@ struct ath_hal_9300 { struct ar9300_ini_array ah_ini_japan2484; struct ar9300_ini_array ah_ini_radio_post_sys2ant; struct ar9300_ini_array ah_ini_BTCOEX_MAX_TXPWR; + struct ar9300_ini_array ah_ini_modes_rxgain_xlna; + struct ar9300_ini_array ah_ini_modes_rxgain_bb_core; + struct ar9300_ini_array ah_ini_modes_rxgain_bb_postamble; + /* * New INI format starting with Osprey 2.0 INI. * Pre, core, post arrays for each sub-system (mac, bb, radio, soc) Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c ============================================================================== --- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c Sun Jun 5 05:49:33 2016 (r301422) +++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_attach.c Sun Jun 5 05:55:27 2016 (r301423) @@ -3542,14 +3542,50 @@ void ar9300_rx_gain_table_apply(struct a INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, ar9300Common_mixed_rx_gain_table_jupiter_2p0, ARRAY_LENGTH(ar9300Common_mixed_rx_gain_table_jupiter_2p0), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core, + ar9462_2p0_baseband_core_mix_rxgain, + ARRAY_LENGTH(ar9462_2p0_baseband_core_mix_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble, + ar9462_2p0_baseband_postamble_mix_rxgain, + ARRAY_LENGTH(ar9462_2p0_baseband_postamble_mix_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, + ar9462_2p0_baseband_postamble_5g_xlna, + ARRAY_LENGTH(ar9462_2p0_baseband_postamble_5g_xlna), 2); break; } else if (AR_SREV_JUPITER_21(ah)) { INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, ar9462_2p1_common_mixed_rx_gain, ARRAY_LENGTH(ar9462_2p1_common_mixed_rx_gain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core, + ar9462_2p1_baseband_core_mix_rxgain, + ARRAY_LENGTH(ar9462_2p1_baseband_core_mix_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble, + ar9462_2p1_baseband_postamble_mix_rxgain, + ARRAY_LENGTH(ar9462_2p1_baseband_postamble_mix_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, + ar9462_2p1_baseband_postamble_5g_xlna, + ARRAY_LENGTH(ar9462_2p1_baseband_postamble_5g_xlna), 2); + break; } + case 3: + if (AR_SREV_JUPITER_21(ah)) { + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, + ar9462_2p1_common_5g_xlna_only_rxgain, + ARRAY_LENGTH(ar9462_2p1_common_5g_xlna_only_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, + ar9462_2p1_baseband_postamble_5g_xlna, + ARRAY_LENGTH(ar9462_2p1_baseband_postamble_5g_xlna), 2); + } else if (AR_SREV_JUPITER_20(ah)) { + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain, + ar9462_2p0_common_5g_xlna_only_rxgain, + ARRAY_LENGTH(ar9462_2p0_common_5g_xlna_only_rxgain), 2); + INIT_INI_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, + ar9462_2p0_baseband_postamble_5g_xlna, + ARRAY_LENGTH(ar9462_2p0_baseband_postamble_5g_xlna), 2); + } + break; case 0: default: if (AR_SREV_HORNET_12(ah)) { Modified: head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c ============================================================================== --- head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sun Jun 5 05:49:33 2016 (r301422) +++ head/sys/contrib/dev/ath/ath_hal/ar9300/ar9300_reset.c Sun Jun 5 05:55:27 2016 (r301423) @@ -3053,6 +3053,26 @@ ar9300_process_ini(struct ath_hal *ah, s REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain, 1, reg_writes); HALDEBUG(ah, HAL_DEBUG_RESET, "ar9300_process_ini: Rx Gain programming\n"); + if (AR_SREV_JUPITER_20_OR_LATER(ah)) { + /* + * CUS217 mix LNA mode. + */ + if (ar9300_rx_gain_index_get(ah) == 2) { + REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bb_core, 1, reg_writes); + REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bb_postamble, + modes_index, reg_writes); + } + + /* + * 5G-XLNA + */ + if ((ar9300_rx_gain_index_get(ah) == 2) || + (ar9300_rx_gain_index_get(ah) == 3)) { + REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_xlna, modes_index, + reg_writes); + } + } + if (AR_SREV_SCORPION(ah)) { /* Write rxgain bounds Array */ REG_WRITE_ARRAY(&ahp->ah_ini_modes_rxgain_bounds, modes_index, reg_writes);
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