From owner-svn-src-stable-12@freebsd.org Fri Nov 29 01:00:07 2019 Return-Path: Delivered-To: svn-src-stable-12@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id BBDB31BE1D1; Fri, 29 Nov 2019 01:00:07 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 47PGPz4Zyzz4JKK; Fri, 29 Nov 2019 01:00:07 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 80FF36517; Fri, 29 Nov 2019 01:00:07 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id xAT107gk023133; Fri, 29 Nov 2019 01:00:07 GMT (envelope-from mav@FreeBSD.org) Received: (from mav@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id xAT107pV023131; Fri, 29 Nov 2019 01:00:07 GMT (envelope-from mav@FreeBSD.org) Message-Id: <201911290100.xAT107pV023131@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: mav set sender to mav@FreeBSD.org using -f From: Alexander Motin Date: Fri, 29 Nov 2019 01:00:07 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r355200 - stable/12/sys/dev/ioat X-SVN-Group: stable-12 X-SVN-Commit-Author: mav X-SVN-Commit-Paths: stable/12/sys/dev/ioat X-SVN-Commit-Revision: 355200 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-12@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for only the 12-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 29 Nov 2019 01:00:07 -0000 Author: mav Date: Fri Nov 29 01:00:06 2019 New Revision: 355200 URL: https://svnweb.freebsd.org/changeset/base/355200 Log: MFC r354752: Cleanup address range checks in ioat(4). - Deduce allowed address range for bus_dma(9) from the hardware version. Different versions (CPU generations) have different documented limits. - Remove difference between address ranges for src/dst and crc. At least docs for few recent generations of CPUs do not mention anything like that, while older are already limited with above limits. - Remove address assertions from arguments. While I do not think the addresses out of allowed ranges should realistically happen there due to the platforms physical address limitations, there is now bus_dma(9) to make sure of that, preferably via IOMMU. - Since crc now has the same address range as src/dst, remove crc_dmamap, reusing dst2_dmamap instead. Modified: stable/12/sys/dev/ioat/ioat.c stable/12/sys/dev/ioat/ioat_internal.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/ioat/ioat.c ============================================================================== --- stable/12/sys/dev/ioat/ioat.c Fri Nov 29 00:58:18 2019 (r355199) +++ stable/12/sys/dev/ioat/ioat.c Fri Nov 29 01:00:06 2019 (r355200) @@ -63,8 +63,11 @@ __FBSDID("$FreeBSD$"); #include "ioat_internal.h" #ifndef BUS_SPACE_MAXADDR_40BIT -#define BUS_SPACE_MAXADDR_40BIT 0xFFFFFFFFFFULL +#define BUS_SPACE_MAXADDR_40BIT MIN(BUS_SPACE_MAXADDR, 0xFFFFFFFFFFULL) #endif +#ifndef BUS_SPACE_MAXADDR_46BIT +#define BUS_SPACE_MAXADDR_46BIT MIN(BUS_SPACE_MAXADDR, 0x3FFFFFFFFFFFULL) +#endif static int ioat_probe(device_t device); static int ioat_attach(device_t device); @@ -412,17 +415,6 @@ ioat_detach(device_t device) bus_dma_tag_destroy(ioat->data_tag); } - if (ioat->data_crc_tag != NULL) { - for (i = 0; i < 1 << ioat->ring_size_order; i++) { - error = ioat_bus_dmamap_destroy(ioat, __func__, - ioat->data_crc_tag, ioat->ring[i].crc_dmamap); - if (error != 0) - return (error); - } - - bus_dma_tag_destroy(ioat->data_crc_tag); - } - if (ioat->ring != NULL) ioat_free_ring(ioat, 1 << ioat->ring_size_order, ioat->ring); @@ -513,6 +505,7 @@ ioat3_attach(device_t device) struct ioat_descriptor *ring; struct ioat_dma_hw_descriptor *dma_hw_desc; void *hw_desc; + bus_addr_t lowaddr; size_t ringsz; int i, num_descriptors; int error; @@ -548,16 +541,25 @@ ioat3_attach(device_t device) ioat->is_submitter_processing = FALSE; - bus_dma_tag_create(bus_get_dma_tag(ioat->device), sizeof(uint64_t), 0x0, - BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, + if (ioat->version >= IOAT_VER_3_3) + lowaddr = BUS_SPACE_MAXADDR_48BIT; + else if (ioat->version >= IOAT_VER_3_2) + lowaddr = BUS_SPACE_MAXADDR_46BIT; + else + lowaddr = BUS_SPACE_MAXADDR_40BIT; + + error = bus_dma_tag_create(bus_get_dma_tag(ioat->device), + sizeof(uint64_t), 0x0, lowaddr, BUS_SPACE_MAXADDR, NULL, NULL, sizeof(uint64_t), 1, sizeof(uint64_t), 0, NULL, NULL, &ioat->comp_update_tag); + if (error != 0) + return (error); error = bus_dmamem_alloc(ioat->comp_update_tag, (void **)&ioat->comp_update, BUS_DMA_ZERO | BUS_DMA_WAITOK, &ioat->comp_update_map); - if (ioat->comp_update == NULL) - return (ENOMEM); + if (error != 0) + return (error); error = bus_dmamap_load(ioat->comp_update_tag, ioat->comp_update_map, ioat->comp_update, sizeof(uint64_t), ioat_comp_update_map, ioat, @@ -570,9 +572,8 @@ ioat3_attach(device_t device) ringsz = sizeof(struct ioat_dma_hw_descriptor) * num_descriptors; error = bus_dma_tag_create(bus_get_dma_tag(ioat->device), - 2 * 1024 * 1024, 0x0, (bus_addr_t)BUS_SPACE_MAXADDR_40BIT, - BUS_SPACE_MAXADDR, NULL, NULL, ringsz, 1, ringsz, 0, NULL, NULL, - &ioat->hw_desc_tag); + 2 * 1024 * 1024, 0x0, lowaddr, BUS_SPACE_MAXADDR, NULL, NULL, + ringsz, 1, ringsz, 0, NULL, NULL, &ioat->hw_desc_tag); if (error != 0) return (error); @@ -589,24 +590,11 @@ ioat3_attach(device_t device) ioat->hw_desc_ring = hw_desc; error = bus_dma_tag_create(bus_get_dma_tag(ioat->device), - 1, 0, BUS_SPACE_MAXADDR_40BIT, BUS_SPACE_MAXADDR, NULL, NULL, + 1, 0, lowaddr, BUS_SPACE_MAXADDR, NULL, NULL, ioat->max_xfer_size, 1, ioat->max_xfer_size, 0, NULL, NULL, - &ioat->data_crc_tag); - if (error != 0) { - ioat_log_message(0, "%s: bus_dma_tag_create failed %d\n", - __func__, error); - return (error); - } - - error = bus_dma_tag_create(bus_get_dma_tag(ioat->device), - 1, 0, BUS_SPACE_MAXADDR_48BIT, BUS_SPACE_MAXADDR, NULL, NULL, - ioat->max_xfer_size, 1, ioat->max_xfer_size, 0, NULL, NULL, &ioat->data_tag); - if (error != 0) { - ioat_log_message(0, "%s: bus_dma_tag_create failed %d\n", - __func__, error); + if (error != 0) return (error); - } ioat->ring = malloc_domainset(num_descriptors * sizeof(*ring), M_IOAT, DOMAINSET_PREF(ioat->domain), M_ZERO | M_WAITOK); @@ -646,14 +634,6 @@ ioat3_attach(device_t device) error); return (error); } - error = bus_dmamap_create(ioat->data_crc_tag, 0, - &ring[i].crc_dmamap); - if (error != 0) { - ioat_log_message(0, - "%s: bus_dmamap_create failed %d\n", __func__, - error); - return (error); - } } for (i = 0; i < num_descriptors; i++) { @@ -851,7 +831,6 @@ ioat_process_events(struct ioat_softc *ioat, boolean_t bus_dmamap_unload(ioat->data_tag, desc->dst_dmamap); bus_dmamap_unload(ioat->data_tag, desc->src2_dmamap); bus_dmamap_unload(ioat->data_tag, desc->dst2_dmamap); - bus_dmamap_unload(ioat->data_crc_tag, desc->crc_dmamap); if (dmadesc->callback_fn != NULL) dmadesc->callback_fn(dmadesc->callback_arg, 0); @@ -1230,10 +1209,6 @@ ioat_copy(bus_dmaengine_t dmaengine, bus_addr_t dst, struct ioat_softc *ioat; ioat = to_ioat_softc(dmaengine); - - KASSERT(((src | dst) & (0xffffull << 48)) == 0, - ("%s: high 16 bits of src/dst are not zero", __func__)); - desc = ioat_op_generic(ioat, IOAT_OP_COPY, len, src, dst, callback_fn, callback_arg, flags); if (desc == NULL) @@ -1264,8 +1239,6 @@ ioat_copy_8k_aligned(bus_dmaengine_t dmaengine, bus_ad ioat = to_ioat_softc(dmaengine); CTR2(KTR_IOAT, "%s channel=%u", __func__, ioat->chan_idx); - KASSERT(((src1 | src2 | dst1 | dst2) & (0xffffull << 48)) == 0, - ("%s: high 16 bits of src/dst are not zero", __func__)); KASSERT(((src1 | src2 | dst1 | dst2) & PAGE_MASK) == 0, ("%s: addresses are not page-aligned", __func__)); @@ -1347,8 +1320,6 @@ ioat_copy_crc(bus_dmaengine_t dmaengine, bus_addr_t ds KASSERT((ioat->capabilities & IOAT_DMACAP_MOVECRC) != 0, ("%s: device lacks MOVECRC capability", __func__)); - KASSERT(((src | dst) & (0xffffffull << 40)) == 0, - ("%s: high 24 bits of src/dst are not zero", __func__)); teststore = (flags & _DMA_CRC_TESTSTORE); KASSERT(teststore != _DMA_CRC_TESTSTORE, ("%s: TEST and STORE invalid", __func__)); @@ -1368,10 +1339,6 @@ ioat_copy_crc(bus_dmaengine_t dmaengine, bus_addr_t ds break; } - KASSERT((flags & DMA_CRC_INLINE) != 0 || - (crcptr & (0xffffffull << 40)) == 0, - ("%s: high 24 bits of crcptr are not zero", __func__)); - desc = ioat_op_generic(ioat, op, len, src, dst, callback_fn, callback_arg, flags & ~_DMA_CRC_FLAGS); if (desc == NULL) @@ -1381,8 +1348,8 @@ ioat_copy_crc(bus_dmaengine_t dmaengine, bus_addr_t ds if ((flags & DMA_CRC_INLINE) == 0) { nseg = -1; - error = _bus_dmamap_load_phys(ioat->data_crc_tag, - desc->crc_dmamap, crcptr, sizeof(uint32_t), 0, + error = _bus_dmamap_load_phys(ioat->data_tag, + desc->dst2_dmamap, crcptr, sizeof(uint32_t), 0, &seg, &nseg); if (error != 0) { ioat_log_message(0, "%s: _bus_dmamap_load_phys" @@ -1423,8 +1390,6 @@ ioat_crc(bus_dmaengine_t dmaengine, bus_addr_t src, bu KASSERT((ioat->capabilities & IOAT_DMACAP_CRC) != 0, ("%s: device lacks CRC capability", __func__)); - KASSERT((src & (0xffffffull << 40)) == 0, - ("%s: high 24 bits of src are not zero", __func__)); teststore = (flags & _DMA_CRC_TESTSTORE); KASSERT(teststore != _DMA_CRC_TESTSTORE, ("%s: TEST and STORE invalid", __func__)); @@ -1444,10 +1409,6 @@ ioat_crc(bus_dmaengine_t dmaengine, bus_addr_t src, bu break; } - KASSERT((flags & DMA_CRC_INLINE) != 0 || - (crcptr & (0xffffffull << 40)) == 0, - ("%s: high 24 bits of crcptr are not zero", __func__)); - desc = ioat_op_generic(ioat, op, len, src, 0, callback_fn, callback_arg, flags & ~_DMA_CRC_FLAGS); if (desc == NULL) @@ -1457,8 +1418,8 @@ ioat_crc(bus_dmaengine_t dmaengine, bus_addr_t src, bu if ((flags & DMA_CRC_INLINE) == 0) { nseg = -1; - error = _bus_dmamap_load_phys(ioat->data_crc_tag, - desc->crc_dmamap, crcptr, sizeof(uint32_t), 0, + error = _bus_dmamap_load_phys(ioat->data_tag, + desc->dst2_dmamap, crcptr, sizeof(uint32_t), 0, &seg, &nseg); if (error != 0) { ioat_log_message(0, "%s: _bus_dmamap_load_phys" @@ -1495,8 +1456,6 @@ ioat_blockfill(bus_dmaengine_t dmaengine, bus_addr_t d KASSERT((ioat->capabilities & IOAT_DMACAP_BFILL) != 0, ("%s: device lacks BFILL capability", __func__)); - KASSERT((dst & (0xffffull << 48)) == 0, - ("%s: high 16 bits of crcptr are not zero", __func__)); desc = ioat_op_generic(ioat, IOAT_OP_FILL, len, 0, dst, callback_fn, callback_arg, flags); Modified: stable/12/sys/dev/ioat/ioat_internal.h ============================================================================== --- stable/12/sys/dev/ioat/ioat_internal.h Fri Nov 29 00:58:18 2019 (r355199) +++ stable/12/sys/dev/ioat/ioat_internal.h Fri Nov 29 01:00:06 2019 (r355200) @@ -418,7 +418,6 @@ struct ioat_descriptor { bus_dmamap_t dst_dmamap; bus_dmamap_t src2_dmamap; bus_dmamap_t dst2_dmamap; - bus_dmamap_t crc_dmamap; }; /* Unused by this driver at this time. */ @@ -465,7 +464,6 @@ struct ioat_softc { bus_dmamap_t hw_desc_map; bus_dma_tag_t data_tag; - bus_dma_tag_t data_crc_tag; bus_dma_tag_t comp_update_tag; bus_dmamap_t comp_update_map;