Date: Thu, 13 Dec 2001 18:35:18 -0800 From: Terry Lambert <tlambert2@mindspring.com> To: Thomas Moestl <tmoestl@gmx.net> Cc: arch@FreeBSD.org Subject: Re: Please review: changes to MI bus code for sparc64 Message-ID: <3C196566.FCE0CAC3@mindspring.com> References: <20011213192033.A871@crow.dom2ip.de> <3C18F78D.C537D487@mindspring.com> <20011213201213.B871@crow.dom2ip.de> <3C192C70.9A79B3C5@mindspring.com> <20011214005031.B4747@crow.dom2ip.de>
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Thomas Moestl wrote: > > I was more concerned with the 1 << 0 not being hit at all. I agree > > on the overflow fix; I was just curious why the entire range was not > > shifted down 1, instead of just avoiding the overflow. > > If no bit from 31 to 1 was found set, an alignment of 1 (i.e. any > address is valid) is assumed. This corresponds to bit 0, so both 1 and > zero mean that no alignment needs to be maintained. Got it, thanks. -- Terry To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message
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