Date: Tue, 13 Jun 2006 04:04:08 GMT From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 99117 for review Message-ID: <200606130404.k5D448Im066940@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=99117 Change 99117 by marcel@marcel_nfs on 2006/06/13 04:03:16 IFC @99114 Affected files ... .. //depot/projects/uart/amd64/amd64/pmap.c#38 integrate .. //depot/projects/uart/amd64/conf/DEFAULTS#4 integrate .. //depot/projects/uart/amd64/conf/NOTES#10 integrate .. //depot/projects/uart/arm/arm/elf_trampoline.c#4 integrate .. //depot/projects/uart/arm/arm/inckern.S#2 integrate .. //depot/projects/uart/arm/arm/pmap.c#16 integrate .. //depot/projects/uart/arm/arm/vm_machdep.c#11 integrate .. //depot/projects/uart/arm/at91/kb920x_machdep.c#3 integrate .. //depot/projects/uart/arm/conf/IQ31244#9 integrate .. //depot/projects/uart/arm/conf/KB920X#3 integrate .. //depot/projects/uart/arm/conf/SKYEYE#3 integrate .. //depot/projects/uart/arm/include/pmap.h#12 integrate .. //depot/projects/uart/arm/sa11x0/assabet_machdep.c#9 integrate .. //depot/projects/uart/arm/sa11x0/uart_cpu_sa1110.c#4 integrate .. //depot/projects/uart/arm/sa11x0/uart_dev_sa1110.c#5 integrate .. //depot/projects/uart/arm/xscale/i80321/iq31244_machdep.c#13 integrate .. //depot/projects/uart/bsm/audit.h#4 integrate .. //depot/projects/uart/bsm/audit_record.h#2 integrate .. //depot/projects/uart/cam/cam_ccb.h#7 integrate .. //depot/projects/uart/cam/cam_xpt.c#12 integrate .. //depot/projects/uart/compat/freebsd32/freebsd32_misc.c#15 integrate .. //depot/projects/uart/compat/linprocfs/linprocfs.c#18 integrate .. //depot/projects/uart/compat/ndis/winx32_wrap.S#3 integrate .. //depot/projects/uart/conf/Makefile.arm#10 integrate .. //depot/projects/uart/conf/files#71 integrate .. //depot/projects/uart/conf/files.arm#6 integrate .. //depot/projects/uart/conf/files.powerpc#10 integrate .. //depot/projects/uart/conf/kern.post.mk#14 integrate .. //depot/projects/uart/conf/options#37 integrate .. //depot/projects/uart/conf/options.arm#8 integrate .. //depot/projects/uart/contrib/dev/ath/COPYRIGHT#4 integrate .. //depot/projects/uart/contrib/dev/ath/README#5 integrate .. //depot/projects/uart/contrib/dev/ath/ah.h#6 integrate .. //depot/projects/uart/contrib/dev/ath/ah_desc.h#4 integrate .. //depot/projects/uart/contrib/dev/ath/ah_devid.h#5 integrate .. //depot/projects/uart/contrib/dev/ath/ah_soc.h#1 branch .. //depot/projects/uart/contrib/dev/ath/freebsd/ah_if.m#4 integrate .. //depot/projects/uart/contrib/dev/ath/freebsd/ah_osdep.c#7 integrate .. //depot/projects/uart/contrib/dev/ath/freebsd/ah_osdep.h#6 integrate .. //depot/projects/uart/contrib/dev/ath/public/alpha-elf.hal.o.uu#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/ap30.hal.o.uu#1 branch .. //depot/projects/uart/contrib/dev/ath/public/ap30.inc#1 branch .. //depot/projects/uart/contrib/dev/ath/public/ap30.opt_ah.h#1 branch .. //depot/projects/uart/contrib/dev/ath/public/ap43.hal.o.uu#1 branch .. //depot/projects/uart/contrib/dev/ath/public/ap43.inc#1 branch .. //depot/projects/uart/contrib/dev/ath/public/ap43.opt_ah.h#1 branch .. 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//depot/projects/uart/contrib/dev/ath/public/armv4-le-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/i386-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/i386-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-be-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-be-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-be-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-le-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-le-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips-le-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-be-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-be-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-be-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-le-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-le-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mips1-le-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-be-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-be-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-be-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-le-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-le-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/mipsisa32-le-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-eabi.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-eabi.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-eabi.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-elf.hal.o.uu#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-elf.inc#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-be-elf.opt_ah.h#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-le-eabi.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-le-eabi.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/powerpc-le-eabi.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/sh4-le-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/sh4-le-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/sparc-be-elf.hal.o.uu#1 branch .. //depot/projects/uart/contrib/dev/ath/public/sparc-be-elf.inc#1 branch .. //depot/projects/uart/contrib/dev/ath/public/sparc-be-elf.opt_ah.h#1 branch .. //depot/projects/uart/contrib/dev/ath/public/sparc64-be-elf.hal.o.uu#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/sparc64-be-elf.inc#2 integrate .. //depot/projects/uart/contrib/dev/ath/public/x86_64-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/x86_64-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-be-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-be-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-be-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-le-elf.hal.o.uu#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-le-elf.inc#3 integrate .. //depot/projects/uart/contrib/dev/ath/public/xscale-le-elf.opt_ah.h#3 integrate .. //depot/projects/uart/contrib/dev/ath/version.h#6 integrate .. //depot/projects/uart/crypto/via/padlock.c#4 integrate .. //depot/projects/uart/dev/acpi_support/acpi_panasonic.c#6 integrate .. //depot/projects/uart/dev/acpica/acpi.c#24 integrate .. //depot/projects/uart/dev/acpica/acpi_battery.c#7 integrate .. //depot/projects/uart/dev/acpica/acpi_thermal.c#9 integrate .. //depot/projects/uart/dev/acpica/acpivar.h#12 integrate .. //depot/projects/uart/dev/ath/if_ath.c#31 integrate .. //depot/projects/uart/dev/ath/if_ath_pci.c#10 integrate .. //depot/projects/uart/dev/ath/if_athvar.h#20 integrate .. //depot/projects/uart/dev/atkbdc/atkbdc_isa.c#3 integrate .. //depot/projects/uart/dev/bce/if_bce.c#2 integrate .. //depot/projects/uart/dev/bge/if_bge.c#27 integrate .. //depot/projects/uart/dev/bge/if_bgereg.h#17 integrate .. //depot/projects/uart/dev/cardbus/cardbus.c#11 integrate .. //depot/projects/uart/dev/cardbus/cardbus_cis.c#11 integrate .. //depot/projects/uart/dev/cm/if_cm_isa.c#6 integrate .. //depot/projects/uart/dev/cm/smc90cx6.c#5 integrate .. //depot/projects/uart/dev/cm/smc90cx6reg.h#2 integrate .. //depot/projects/uart/dev/cm/smc90cx6var.h#4 integrate .. //depot/projects/uart/dev/dc/if_dc.c#7 integrate .. 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//depot/projects/uart/dev/mxge/mcp_gen_header.h#1 branch .. //depot/projects/uart/dev/mxge/mxge_mcp.h#1 branch .. //depot/projects/uart/dev/my/if_my.c#10 integrate .. //depot/projects/uart/dev/puc/pucdata.c#47 integrate .. //depot/projects/uart/dev/ral/rt2661.c#6 integrate .. //depot/projects/uart/dev/safe/safe.c#10 integrate .. //depot/projects/uart/dev/sk/if_sk.c#8 integrate .. //depot/projects/uart/dev/ubsec/ubsec.c#13 integrate .. //depot/projects/uart/dev/usb/ugen.c#13 integrate .. //depot/projects/uart/dev/wi/if_wi.c#17 integrate .. //depot/projects/uart/fs/procfs/procfs.c#5 integrate .. //depot/projects/uart/geom/eli/g_eli.c#8 integrate .. //depot/projects/uart/geom/eli/g_eli.h#4 integrate .. //depot/projects/uart/geom/eli/g_eli_ctl.c#4 integrate .. //depot/projects/uart/geom/eli/g_eli_integrity.c#1 branch .. //depot/projects/uart/geom/eli/g_eli_key.c#3 integrate .. //depot/projects/uart/geom/eli/g_eli_privacy.c#1 branch .. //depot/projects/uart/geom/geom.h#11 integrate .. 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//depot/projects/uart/vm/vm_map.c#21 integrate .. //depot/projects/uart/vm/vm_meter.c#7 integrate Differences ... ==== //depot/projects/uart/amd64/amd64/pmap.c#38 (text+ko) ==== @@ -77,7 +77,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/amd64/amd64/pmap.c,v 1.554 2006/05/01 22:06:59 jhb Exp $"); +__FBSDID("$FreeBSD: src/sys/amd64/amd64/pmap.c,v 1.556 2006/06/12 20:05:27 alc Exp $"); /* * Manages physical address maps. @@ -209,6 +209,8 @@ static pv_entry_t get_pv_entry(pmap_t locked_pmap, int try); static void pmap_clear_ptes(vm_page_t m, long bit); +static vm_page_t pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, + vm_page_t m, vm_prot_t prot, vm_page_t mpte); static int pmap_remove_pte(pmap_t pmap, pt_entry_t *ptq, vm_offset_t sva, pd_entry_t ptepde); static void pmap_remove_page(pmap_t pmap, vm_offset_t va, pd_entry_t *pde); @@ -1004,17 +1006,22 @@ * Note: SMP coherent. Uses a ranged shootdown IPI. */ void -pmap_qenter(vm_offset_t sva, vm_page_t *m, int count) +pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count) { - vm_offset_t va; + pt_entry_t *endpte, oldpte, *pte; - va = sva; - while (count-- > 0) { - pmap_kenter(va, VM_PAGE_TO_PHYS(*m)); - va += PAGE_SIZE; - m++; + oldpte = 0; + pte = vtopte(sva); + endpte = pte + count; + while (pte < endpte) { + oldpte |= *pte; + pte_store(pte, VM_PAGE_TO_PHYS(*ma) | PG_G | PG_RW | PG_V); + pte++; + ma++; } - pmap_invalidate_range(kernel_pmap, sva, va); + if ((oldpte & PG_V) != 0) + pmap_invalidate_range(kernel_pmap, sva, sva + count * + PAGE_SIZE); } /* @@ -2310,6 +2317,37 @@ } /* + * Maps a sequence of resident pages belonging to the same object. + * The sequence begins with the given page m_start. This page is + * mapped at the given virtual address start. Each subsequent page is + * mapped at a virtual address that is offset from start by the same + * amount as the page is offset from m_start within the object. The + * last page in the sequence is the page with the largest offset from + * m_start that can be mapped at a virtual address less than the given + * virtual address end. Not every virtual page between start and end + * is mapped; only those for which a resident page exists with the + * corresponding offset from m_start are mapped. + */ +void +pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end, + vm_page_t m_start, vm_prot_t prot) +{ + vm_page_t m, mpte; + vm_pindex_t diff, psize; + + psize = atop(end - start); + mpte = NULL; + m = m_start; + PMAP_LOCK(pmap); + while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) { + mpte = pmap_enter_quick_locked(pmap, start + ptoa(diff), m, + prot, mpte); + m = TAILQ_NEXT(m, listq); + } + PMAP_UNLOCK(pmap); +} + +/* * this code makes some *MAJOR* assumptions: * 1. Current pmap & pmap exists. * 2. Not wired. @@ -2322,15 +2360,26 @@ pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot, vm_page_t mpte) { + + PMAP_LOCK(pmap); + mpte = pmap_enter_quick_locked(pmap, va, m, prot, mpte); + PMAP_UNLOCK(pmap); + return (mpte); +} + +static vm_page_t +pmap_enter_quick_locked(pmap_t pmap, vm_offset_t va, vm_page_t m, + vm_prot_t prot, vm_page_t mpte) +{ pt_entry_t *pte; vm_paddr_t pa; KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva || (m->flags & (PG_FICTITIOUS | PG_UNMANAGED)) != 0, - ("pmap_enter_quick: managed mapping within the clean submap")); + ("pmap_enter_quick_locked: managed mapping within the clean submap")); mtx_assert(&vm_page_queue_mtx, MA_OWNED); VM_OBJECT_LOCK_ASSERT(m->object, MA_OWNED); - PMAP_LOCK(pmap); + PMAP_LOCK_ASSERT(pmap, MA_OWNED); /* * In the case that a page table page is not @@ -2395,7 +2444,7 @@ pmap_unwire_pte_hold(pmap, va, mpte); mpte = NULL; } - goto out; + return (mpte); } /* @@ -2422,8 +2471,6 @@ pte_store(pte, pa | PG_V | PG_U); else pte_store(pte, pa | PG_V | PG_U | PG_MANAGED); -out: - PMAP_UNLOCK(pmap); return mpte; } ==== //depot/projects/uart/amd64/conf/DEFAULTS#4 (text+ko) ==== @@ -1,7 +1,7 @@ # # DEFAULTS -- Default kernel configuration file for FreeBSD/amd64 # -# $FreeBSD: src/sys/amd64/conf/DEFAULTS,v 1.5 2006/04/28 21:21:51 marcel Exp $ +# $FreeBSD: src/sys/amd64/conf/DEFAULTS,v 1.6 2006/06/12 04:21:49 imp Exp $ machine amd64 @@ -11,3 +11,6 @@ # Pseudo devices. device mem # Memory and kernel memory devices device io # I/O device + +# UART chips on this platform +device uart_ns8250 ==== //depot/projects/uart/amd64/conf/NOTES#10 (text+ko) ==== @@ -4,7 +4,7 @@ # This file contains machine dependent kernel configuration notes. For # machine independent notes, look in /sys/conf/NOTES. # -# $FreeBSD: src/sys/amd64/conf/NOTES,v 1.55 2006/05/14 18:49:24 marius Exp $ +# $FreeBSD: src/sys/amd64/conf/NOTES,v 1.56 2006/06/12 20:38:17 jhb Exp $ # # @@ -221,13 +221,21 @@ # ed: Western Digital and SMC 80xx; Novell NE1000 and NE2000; 3Com 3C503 # HP PC Lan+, various PC Card devices (refer to etc/defaults/pccard.conf) # (requires miibus) +# ipw: Intel PRO/Wireless 2100 IEEE 802.11 adapter +# iwi: Intel PRO/Wireless 2200BG/2225BG/2915ABG IEEE 802.11 adapters # nve: nVidia nForce MCP on-board Ethernet Networking +# ral: Ralink Technology IEEE 802.11 wireless adapter +# ural: Ralink Technology RT2500USB IEEE 802.11 wireless adapter device ed options ED_3C503 options ED_HPP options ED_SIC +device iwi +device ipw device nve # nVidia nForce MCP on-board Ethernet Networking +device ral +device ural device ath device ath_hal # Atheros HAL (includes binary component) @@ -556,6 +564,10 @@ options VM_KMEM_SIZE_MAX options VM_KMEM_SIZE_SCALE +# Enable NDIS binary driver support +options NDISAPI +device ndis + # The I/O device device io ==== //depot/projects/uart/arm/arm/elf_trampoline.c#4 (text+ko) ==== @@ -23,7 +23,7 @@ */ #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.6 2006/05/30 21:13:47 cognet Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/elf_trampoline.c,v 1.7 2006/06/12 22:58:50 cognet Exp $"); #include <machine/asm.h> #include <sys/types.h> #include <sys/elf32.h> @@ -32,6 +32,7 @@ #include <machine/elf.h> #include <machine/pte.h> #include <machine/cpufunc.h> +#include <machine/armreg.h> #include <stdlib.h> @@ -41,6 +42,8 @@ extern char kernel_start[]; extern char kernel_end[]; +extern void *_end; + void __start(void); #define GZ_HEAD 0xa @@ -50,7 +53,7 @@ #elif defined(CPU_ARM8) #define cpu_idcache_wbinv_all arm8_cache_purgeID #elif defined(CPU_ARM9) -#define cpu_idcache_wbinv_all arm9_dcache_wbinv_all +#define cpu_idcache_wbinv_all arm9_idcache_wbinv_all #elif defined(CPU_ARM10) #define cpu_idcache_wbinv_all arm10_idcache_wbinv_all #elif defined(CPU_SA110) || defined(CPU_SA1110) || defined(CPU_SA1100) || \ @@ -60,8 +63,35 @@ defined(CPU_XSCALE_PXA2X0) || defined(CPU_XSCALE_IXP425) #define cpu_idcache_wbinv_all xscale_cache_purgeID #endif -int arm_pdcache_line_size = 32; + +#ifdef KZIP +int arm_picache_size; +int arm_picache_line_size; +int arm_picache_ways; + +int arm_pdcache_size; /* and unified */ +int arm_pdcache_line_size = 32; +int arm_pdcache_ways; + +int arm_pcache_type; +int arm_pcache_unified; + +int arm_dcache_align; +int arm_dcache_align_mask; + +/* Additional cache information local to this file. Log2 of some of the + above numbers. */ +static int arm_dcache_l2_nsets; +static int arm_dcache_l2_assoc; +static int arm_dcache_l2_linesize; + + int block_userspace_access = 0; +extern int arm9_dcache_sets_inc; +extern int arm9_dcache_sets_max; +extern int arm9_dcache_index_max; +extern int arm9_dcache_index_inc; +#endif static __inline void * memcpy(void *dst, const void *src, int len) @@ -107,13 +137,18 @@ { int physaddr = KERNPHYSADDR; int tmp1; + unsigned int sp = (unsigned int)&_end; +#ifdef KZIP + sp += KERNSIZE + 0x100; + sp &= ~(L1_TABLE_SIZE - 1); + sp += 2 * L1_TABLE_SIZE; +#endif + sp += 1024 * 1024; /* Should be enough for a stack */ __asm __volatile("adr %0, 2f\n" "bic %0, %0, #0xff000000\n" - "bic sp, sp, #0xff000000\n" "and %1, %1, #0xff000000\n" "orr %0, %0, %1\n" - "orr sp, sp, %1\n" "mrc p15, 0, %1, c1, c0, 0\n" "bic %1, %1, #1\n" /* Disable MMU */ "orr %1, %1, #(4 | 8)\n" /* Add DC enable, @@ -127,11 +162,92 @@ "nop\n" "mov pc, %0\n" "2: nop\n" - : "=r" (tmp1), "+r" (physaddr)); + "mov sp, %2\n" + : "=r" (tmp1), "+r" (physaddr), "+r" (sp)); __start(); } #ifdef KZIP +static void +get_cachetype_cp15() +{ + u_int ctype, isize, dsize; + u_int multiplier; + + __asm __volatile("mrc p15, 0, %0, c0, c0, 1" + : "=r" (ctype)); + + /* + * ...and thus spake the ARM ARM: + * + * If an <opcode2> value corresponding to an unimplemented or + * reserved ID register is encountered, the System Control + * processor returns the value of the main ID register. + */ + if (ctype == cpufunc_id()) + goto out; + + if ((ctype & CPU_CT_S) == 0) + arm_pcache_unified = 1; + + /* + * If you want to know how this code works, go read the ARM ARM. + */ + + arm_pcache_type = CPU_CT_CTYPE(ctype); + if (arm_pcache_unified == 0) { + isize = CPU_CT_ISIZE(ctype); + multiplier = (isize & CPU_CT_xSIZE_M) ? 3 : 2; + arm_picache_line_size = 1U << (CPU_CT_xSIZE_LEN(isize) + 3); + if (CPU_CT_xSIZE_ASSOC(isize) == 0) { + if (isize & CPU_CT_xSIZE_M) + arm_picache_line_size = 0; /* not present */ + else + arm_picache_ways = 1; + } else { + arm_picache_ways = multiplier << + (CPU_CT_xSIZE_ASSOC(isize) - 1); + } + arm_picache_size = multiplier << (CPU_CT_xSIZE_SIZE(isize) + 8); + } + + dsize = CPU_CT_DSIZE(ctype); + multiplier = (dsize & CPU_CT_xSIZE_M) ? 3 : 2; + arm_pdcache_line_size = 1U << (CPU_CT_xSIZE_LEN(dsize) + 3); + if (CPU_CT_xSIZE_ASSOC(dsize) == 0) { + if (dsize & CPU_CT_xSIZE_M) + arm_pdcache_line_size = 0; /* not present */ + else + arm_pdcache_ways = 1; + } else { + arm_pdcache_ways = multiplier << + (CPU_CT_xSIZE_ASSOC(dsize) - 1); + } + arm_pdcache_size = multiplier << (CPU_CT_xSIZE_SIZE(dsize) + 8); + + arm_dcache_align = arm_pdcache_line_size; + + arm_dcache_l2_assoc = CPU_CT_xSIZE_ASSOC(dsize) + multiplier - 2; + arm_dcache_l2_linesize = CPU_CT_xSIZE_LEN(dsize) + 3; + arm_dcache_l2_nsets = 6 + CPU_CT_xSIZE_SIZE(dsize) - + CPU_CT_xSIZE_ASSOC(dsize) - CPU_CT_xSIZE_LEN(dsize); + out: + arm_dcache_align_mask = arm_dcache_align - 1; +} + +static void +arm9_setup(void) +{ + + get_cachetype_cp15(); + arm9_dcache_sets_inc = 1U << arm_dcache_l2_linesize; + arm9_dcache_sets_max = (1U << (arm_dcache_l2_linesize + + arm_dcache_l2_nsets)) - arm9_dcache_sets_inc; + arm9_dcache_index_inc = 1U << (32 - arm_dcache_l2_assoc); + arm9_dcache_index_max = 0U - arm9_dcache_index_inc; +} + + static unsigned char *orig_input, *i_input, *i_output; @@ -354,7 +470,6 @@ extern char func_end[]; -extern void *_end; #define PMAP_DOMAIN_KERNEL 15 /* * Just define it instead of including the @@ -404,6 +519,7 @@ void *curaddr; void *dst, *altdst; char *kernel = (char *)&kernel_start; + int sp; __asm __volatile("mov %0, pc" : "=r" (curaddr)); @@ -413,6 +529,11 @@ int pt_addr = (((int)&_end + KERNSIZE + 0x100) & ~(L1_TABLE_SIZE - 1)) + L1_TABLE_SIZE; +#ifdef CPU_ARM9 + /* So that idcache_wbinv works; */ + if ((cpufunc_id() & 0x0000f000) == 0x00009000) + arm9_setup(); +#endif setup_pagetables(pt_addr, (vm_paddr_t)curaddr, (vm_paddr_t)curaddr + 0x10000000); /* Gzipped kernel */ @@ -433,10 +554,10 @@ dst = 4 + load_kernel((unsigned int)&kernel_start, (unsigned int)curaddr, (unsigned int)&func_end, 0); + sp = (vm_offset_t)dst + 4096; + dst = (void *)sp; memcpy((void *)dst, (void *)&load_kernel, (unsigned int)&func_end - (unsigned int)&load_kernel); - ((void (*)())dst)((unsigned int)kernel, - (unsigned int)curaddr, - dst + (unsigned int)(&func_end) - - (unsigned int)(&load_kernel), 1); + do_call(dst, kernel, dst + (unsigned int)(&func_end) - + (unsigned int)(&load_kernel), sp); } ==== //depot/projects/uart/arm/arm/inckern.S#2 (text+ko) ==== @@ -25,7 +25,15 @@ #include "opt_kernname.h" #include <machine/asm.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/inckern.S,v 1.2 2005/12/05 12:55:46 cognet Exp $") +__FBSDID("$FreeBSD: src/sys/arm/arm/inckern.S,v 1.3 2006/06/12 22:58:50 cognet Exp $") +ENTRY(do_call) + mov r6, r0 + mov r0, r1 + ldr r1, =0xfff00000 + and r1, pc, r1 + mov sp, r3 + mov r3, #1 + mov pc, r6 .section ".real_kernel","aw" .globl kernel_start; kernel_start: ==== //depot/projects/uart/arm/arm/pmap.c#16 (text+ko) ==== @@ -147,7 +147,7 @@ #include "opt_vm.h" #include <sys/cdefs.h> -__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.52 2006/06/01 01:31:07 alc Exp $"); +__FBSDID("$FreeBSD: src/sys/arm/arm/pmap.c,v 1.63 2006/06/11 04:53:06 alc Exp $"); #include <sys/param.h> #include <sys/systm.h> #include <sys/kernel.h> @@ -272,9 +272,6 @@ */ union pmap_cache_state *pmap_cache_state; -LIST_HEAD(pmaplist, pmap); -struct pmaplist allpmaps; - /* static pt_entry_t *msgbufmap;*/ struct msgbuf *msgbufp = 0; @@ -415,9 +412,7 @@ static vm_offset_t pmap_kernel_l2ptp_kva; static vm_paddr_t pmap_kernel_l2ptp_phys; static struct vm_object pvzone_obj; -static struct vm_object l2zone_obj; static int pv_entry_count=0, pv_entry_max=0, pv_entry_high_water=0; -int pmap_pagedaemon_waken = 0; /* * This list exists for the benefit of pmap_map_chunk(). It keeps track @@ -459,14 +454,8 @@ struct pv_addr *pv; SLIST_FOREACH(pv, &kernel_pt_list, pv_list) { -#ifndef ARM32_NEW_VM_LAYOUT - if (pv->pv_pa == (pa & ~PAGE_MASK)) { - return (pv->pv_va | (pa & PAGE_MASK)); - } -#else if (pv->pv_pa == pa) return (pv->pv_va); -#endif } return (0); } @@ -718,21 +707,12 @@ for (; size != 0; va += L2_S_SIZE, pa += L2_S_SIZE, size -= L2_S_SIZE) { -#ifndef ARM32_NEW_VM_LAYOUT - pte = (pt_entry_t *) - kernel_pt_lookup(pde[va >> L1_S_SHIFT] & L2_S_FRAME); -#else pte = (pt_entry_t *) kernel_pt_lookup( pde[L1_IDX(va)] & L1_C_ADDR_MASK); -#endif if (pte == NULL) panic("xscale_setup_minidata: can't find L2 table for " "VA 0x%08x", (u_int32_t) va); -#ifndef ARM32_NEW_VM_LAYOUT - pte[(va >> PAGE_SHIFT) & 0x3ff] = -#else pte[l2pte_index(va)] = -#endif L2_S_PROTO | pa | L2_S_PROT(PTE_KERNEL, VM_PROT_READ) | L2_C | L2_XSCALE_T_TEX(TEX_XSCALE_X); } @@ -917,6 +897,7 @@ l1idx = L1_IDX(va); + PMAP_ASSERT_LOCKED(pm); mtx_assert(&vm_page_queue_mtx, MA_OWNED); if ((l2 = pm->pm_l2[L2_IDX(l1idx)]) == NULL) { /* @@ -925,16 +906,21 @@ * Need to allocate a new l2_dtable. */ again_l2table: + PMAP_UNLOCK(pm); vm_page_unlock_queues(); if ((l2 = pmap_alloc_l2_dtable()) == NULL) { vm_page_lock_queues(); + PMAP_LOCK(pm); return (NULL); } vm_page_lock_queues(); + PMAP_LOCK(pm); if (pm->pm_l2[L2_IDX(l1idx)] != NULL) { + PMAP_UNLOCK(pm); vm_page_unlock_queues(); uma_zfree(l2table_zone, l2); vm_page_lock_queues(); + PMAP_LOCK(pm); l2 = pm->pm_l2[L2_IDX(l1idx)]; if (l2 == NULL) goto again_l2table; @@ -964,14 +950,18 @@ * is because we just allocated the l2_dtable, above. */ again_ptep: + PMAP_UNLOCK(pm); vm_page_unlock_queues(); ptep = (void*)uma_zalloc(l2zone, M_NOWAIT); vm_page_lock_queues(); + PMAP_LOCK(pm); if (l2b->l2b_kva != 0) { /* We lost the race. */ + PMAP_UNLOCK(pm); vm_page_unlock_queues(); uma_zfree(l2zone, ptep); vm_page_lock_queues(); + PMAP_LOCK(pm); if (l2b->l2b_kva == 0) goto again_ptep; return (l2b); @@ -1315,6 +1305,7 @@ { int nattr; + mtx_assert(&vm_page_queue_mtx, MA_OWNED); nattr = pmap_get_vac_flags(pg); if (nattr < 0) { @@ -1545,10 +1536,8 @@ vm_offset_t va; u_int oflags; int count = 0; -#if 0 - PMAP_HEAD_TO_MAP_LOCK(); - simple_lock(&pg->mdpage.pvh_slock); -#endif + + mtx_assert(&vm_page_queue_mtx, MA_OWNED); /* * Clear saved attributes (modify, reference) @@ -1556,10 +1545,6 @@ pg->md.pvh_attrs &= ~(maskbits & (PVF_MOD | PVF_REF)); if (TAILQ_EMPTY(&pg->md.pv_list)) { -#if 0 - simple_unlock(&pg->mdpage.pvh_slock); - PMAP_HEAD_TO_MAP_UNLOCK(); -#endif return (0); } @@ -1572,9 +1557,7 @@ >>> TRUNCATED FOR MAIL (1000 lines) <<<
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