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Date:      Fri, 22 Feb 2008 18:04:58 +0200
From:      Andriy Gapon <avg@icyb.net.ua>
To:        freebsd-acpi@freebsd.org, freebsd-hackers@freebsd.org
Subject:   Re: cx_lowest and CPU usage
Message-ID:  <47BEF2AA.900@icyb.net.ua>
In-Reply-To: <47BC7287.6000301@icyb.net.ua>
References:  <479F0ED4.9030709@icyb.net.ua> <479F62D9.6080703@root.org>	<47A33CCB.3090902@icyb.net.ua> <47B0C10F.6000109@icyb.net.ua>	<47B4103A.6090902@icyb.net.ua> <uh7bq6jcveu.fsf@P142.sics.se> <47B4A103.7040801@icyb.net.ua> <47B4B31A.4020605@icyb.net.ua> <47B84E61.3060401@icyb.net.ua> <47BB375C.5010208@icyb.net.ua> <47BB4D5C.9000406@icyb.net.ua> <47BC7287.6000301@icyb.net.ua>

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on 20/02/2008 20:33 Andriy Gapon said the following:
> on 19/02/2008 23:42 Andriy Gapon said the following:
>> The last result most probably means that RTC IRQ was not the interrupt
>> to wake CPU from sleeping state.
>> The first possibility that comes to mind is that on this particular
>> hardware RTC interrupt (IRQ8) is not able to wake the system from C2 state.
> 
> So it seems that this was true.
> Here's a shortcut to the relevant info:
> PIIX4E (FW82371EB) specification
> DEVACTB — DEVICE ACTIVITY B (FUNCTION 3) pci register description
> BRLD_EN_IRQ8, bit 5
> 
> $ pciconf -r pci0:0:7:3 0x58
> 03040c07

Attached is a patch that fixes the issue for me (without any
side-effects) and should not cause any harm for others.

-- 
Andriy Gapon

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Content-Type: text/x-patch;
 name="acpi_cpu-piix4-irqs.patch"
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Content-Disposition: inline;
 filename="acpi_cpu-piix4-irqs.patch"

--- acpi_cpu.c.orig	2008-02-21 21:08:16.000000000 +0200
+++ acpi_cpu.c	2008-02-21 21:13:54.000000000 +0200
@@ -113,6 +113,12 @@
 #define PCI_REVISION_B_STEP	1
 #define PCI_REVISION_4E		2
 #define PCI_REVISION_4M		3
+#define PIIX4_DEVACTB_REG	0x58
+#define PIIX4_BRLD_EN_IRQ0	(1<<0)
+#define PIIX4_BRLD_EN_IRQ	(1<<1)
+#define PIIX4_BRLD_EN_IRQ8	(1<<5)
+#define PIIX4_STOP_BREAK_MASK	(PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
+#define PIIX4_PCNTRL_BST_EN	(1<<10)
 
 /* Platform hardware resource information. */
 static uint32_t		 cpu_smi_cmd;	/* Value to write to SMI_CMD. */
@@ -1004,6 +1010,7 @@
 acpi_cpu_quirks(void)
 {
     device_t acpi_dev;
+    uint32_t val;
 
     ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
 
@@ -1052,12 +1059,25 @@
 	 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
 	 * Livelock") from the January 2002 PIIX4 specification update.
 	 * Applies to all PIIX4 models.
+	 *
+	 * Also, make sure that all interrupts cause a "Stop Break"
+	 * event to exit from C2 state.
 	 */
+	case PCI_REVISION_A_STEP:
+	case PCI_REVISION_B_STEP:
 	case PCI_REVISION_4E:
 	case PCI_REVISION_4M:
 	    cpu_quirks |= CPU_QUIRK_NO_C3;
 	    ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 		"acpi_cpu: working around PIIX4 bug, disabling C3\n"));
+
+	    val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
+	    if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
+		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
+		    "PIIX4: enabling IRQs to generate Stop Break\n"));
+	    	val |= PIIX4_STOP_BREAK_MASK;
+		pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
+	    }
 	    break;
 	default:
 	    break;

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