From owner-svn-src-all@freebsd.org Tue Jan 9 14:33:07 2018 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 427F7E7FCA7; Tue, 9 Jan 2018 14:33:07 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 1A6C97EF85; Tue, 9 Jan 2018 14:33:07 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 6A22A182AA; Tue, 9 Jan 2018 14:33:06 +0000 (UTC) (envelope-from andrew@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w09EX6Zb034745; Tue, 9 Jan 2018 14:33:06 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w09EX5ef034740; Tue, 9 Jan 2018 14:33:05 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201801091433.w09EX5ef034740@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Tue, 9 Jan 2018 14:33:05 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r327727 - in head/sys: arm64/arm64 arm64/include conf X-SVN-Group: head X-SVN-Commit-Author: andrew X-SVN-Commit-Paths: in head/sys: arm64/arm64 arm64/include conf X-SVN-Commit-Revision: 327727 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 09 Jan 2018 14:33:07 -0000 Author: andrew Date: Tue Jan 9 14:33:05 2018 New Revision: 327727 URL: https://svnweb.freebsd.org/changeset/base/327727 Log: Add a framework to install CPU errata on arm64. Each erratum can encode a mask and value to compare with the Main ID Register. If these match then a function is called to handle the installation of the erratum workaround. No errata are currently handled, however this will change soon in a future commit. MFC after: 1 week Sponsored by: DARPA, AFRL Added: head/sys/arm64/arm64/cpu_errata.c (contents, props changed) Modified: head/sys/arm64/arm64/machdep.c head/sys/arm64/arm64/mp_machdep.c head/sys/arm64/include/cpu.h head/sys/conf/files.arm64 Added: head/sys/arm64/arm64/cpu_errata.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm64/arm64/cpu_errata.c Tue Jan 9 14:33:05 2018 (r327727) @@ -0,0 +1,68 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause + * + * Copyright (c) 2018 Andrew Turner + * All rights reserved. + * + * This software was developed by SRI International and the University of + * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237 + * ("CTSRD"), as part of the DARPA CRASH research programme. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include + +#include + +typedef void (cpu_quirk_install)(void); +struct cpu_quirks { + cpu_quirk_install *quirk_install; + u_int midr_mask; + u_int midr_value; +}; + +static cpu_quirk_install install_psci_bp_hardening; + +static struct cpu_quirks cpu_quirks[] = { +}; + +void +install_cpu_errata(void) +{ + u_int midr; + size_t i; + + midr = get_midr(); + + for (i = 0; i < nitems(cpu_quirks); i++) { + if ((midr & cpu_quirks[i].midr_mask) == + cpu_quirks[i].midr_value) { + cpu_quirks[i].quirk_install(); + } + } +} Modified: head/sys/arm64/arm64/machdep.c ============================================================================== --- head/sys/arm64/arm64/machdep.c Tue Jan 9 14:22:18 2018 (r327726) +++ head/sys/arm64/arm64/machdep.c Tue Jan 9 14:33:05 2018 (r327727) @@ -172,6 +172,7 @@ cpu_startup(void *dummy) undef_init(); identify_cpu(); + install_cpu_errata(); vm_ksubmap_init(&kmi); bufinit(); Modified: head/sys/arm64/arm64/mp_machdep.c ============================================================================== --- head/sys/arm64/arm64/mp_machdep.c Tue Jan 9 14:22:18 2018 (r327726) +++ head/sys/arm64/arm64/mp_machdep.c Tue Jan 9 14:33:05 2018 (r327727) @@ -282,6 +282,7 @@ init_secondary(uint64_t cpu) * runtime chip identification. */ identify_cpu(); + install_cpu_errata(); intr_pic_init_secondary(); Modified: head/sys/arm64/include/cpu.h ============================================================================== --- head/sys/arm64/include/cpu.h Tue Jan 9 14:22:18 2018 (r327726) +++ head/sys/arm64/include/cpu.h Tue Jan 9 14:33:05 2018 (r327727) @@ -150,6 +150,7 @@ void cpu_halt(void) __dead2; void cpu_reset(void) __dead2; void fork_trampoline(void); void identify_cpu(void); +void install_cpu_errata(void); void print_cpu_features(u_int); void swi_vm(void *v); Modified: head/sys/conf/files.arm64 ============================================================================== --- head/sys/conf/files.arm64 Tue Jan 9 14:22:18 2018 (r327726) +++ head/sys/conf/files.arm64 Tue Jan 9 14:33:05 2018 (r327727) @@ -96,6 +96,7 @@ arm64/arm64/bzero.S standard arm64/arm64/clock.c standard arm64/arm64/copyinout.S standard arm64/arm64/copystr.c standard +arm64/arm64/cpu_errata.c standard arm64/arm64/cpufunc_asm.S standard arm64/arm64/db_disasm.c optional ddb arm64/arm64/db_interface.c optional ddb