Date: Tue, 23 Jul 2019 20:31:54 +0000 (UTC) From: Dimitry Andric <dim@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r350259 - in stable/11: . contrib/compiler-rt/lib/sanitizer_common contrib/libunwind/src contrib/llvm/lib/DebugInfo/DWARF contrib/llvm/lib/MC contrib/llvm/lib/Object contrib/llvm/lib/Ta... Message-ID: <201907232031.x6NKVsph095337@repo.freebsd.org>
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Author: dim Date: Tue Jul 23 20:31:54 2019 New Revision: 350259 URL: https://svnweb.freebsd.org/changeset/base/350259 Log: MFC r348504 (by kevans): llvm-symbolizer: Move out of CLANG_EXTRAS, into CLANG ASAN reports become a lot more useful with llvm-symbolizer in $PATH, and the build is not much more time-consuming. The added benefit is that the resulting reports will actually include symbol information; without, thread trace information includes a bunch of addresses that immediately resolve to an inline function in ^/contrib/compiler-rt/lib/sanitizer_common/sanitizer_common.h and take a little more effort to examine. Reviewed by: emaste Differential Revision: https://reviews.freebsd.org/D20484 MFC r348689 (by emaste): Use CLANG knob to remove llvm-symbolizer man page r348504 moved llvm-symbolizer from the CLANG_EXTRAS knob to CLANG, but the man page was still in the CLANG_EXTRAS section in OptionalObsoleteFiles.inc. Reported by: jhb MFC r349004: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt, libc++, libunwind and openmp to the upstream release_80 branch r363030 (effectively, 8.0.1 rc2). The 8.0.1 release should follow this within a week or so. MFC r349351 (by jhibbits, partially): powerpc: Transition to Secure-PLT, like most other OSs (Toolchain part) Summary: Toolchain follow-up to r349350. LLVM patches will be submitted upstream for 9.0 as well. The bsd.cpu.mk change is required because GNU ld assumes BSS-PLT if it cannot determine for certain that it needs Secure-PLT, and some binaries do not compile in such a way to make it know to use Secure-PLT. Reviewed By: nwhitehorn, bdragon, pfg Differential Revision: https://reviews.freebsd.org/D20598 MFC r349793: Upgrade our copies of clang, llvm, lld, lldb, compiler-rt, libc++, libunwind and openmp to the upstream release_80 branch r364487 (effectively, 8.0.1 rc3). The 8.0.1 release will most likely have no further changes. MFC r350177: Merge llvm, clang, compiler-rt, libc++, libunwind, lld, lldb and openmp 8.0.1 final release r366581. The only functional change is a fix for a mismerge of upstream r360816, which properly restores the r2 register when unwinding on PowerPC64 (See https://reviews.freebsd.org/D20337). Relnotes: yes PR: 236062 Modified: stable/11/ObsoleteFiles.inc stable/11/UPDATING stable/11/contrib/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_netbsd.cc stable/11/contrib/libunwind/src/DwarfInstructions.hpp stable/11/contrib/libunwind/src/UnwindRegistersRestore.S stable/11/contrib/libunwind/src/UnwindRegistersSave.S stable/11/contrib/libunwind/src/assembly.h stable/11/contrib/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp stable/11/contrib/llvm/lib/MC/ELFObjectWriter.cpp stable/11/contrib/llvm/lib/MC/MCWin64EH.cpp stable/11/contrib/llvm/lib/MC/WasmObjectWriter.cpp stable/11/contrib/llvm/lib/Object/COFFImportFile.cpp stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredicates.td stable/11/contrib/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp stable/11/contrib/llvm/lib/Target/AMDGPU/VOP2Instructions.td stable/11/contrib/llvm/lib/Target/AVR/AVRISelLowering.cpp stable/11/contrib/llvm/lib/Target/AVR/AVRISelLowering.h stable/11/contrib/llvm/lib/Target/AVR/AVRSubtarget.cpp stable/11/contrib/llvm/lib/Target/AVR/AVRSubtarget.h stable/11/contrib/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp stable/11/contrib/llvm/lib/Target/Mips/MicroMips32r6InstrInfo.td stable/11/contrib/llvm/lib/Target/Mips/MicroMipsInstrFPU.td stable/11/contrib/llvm/lib/Target/Mips/MipsAsmPrinter.cpp stable/11/contrib/llvm/lib/Target/Mips/MipsDSPInstrInfo.td stable/11/contrib/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp stable/11/contrib/llvm/lib/Target/Mips/MipsFastISel.cpp stable/11/contrib/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp stable/11/contrib/llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp stable/11/contrib/llvm/lib/Target/PowerPC/InstPrinter/PPCInstPrinter.cpp stable/11/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp stable/11/contrib/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp stable/11/contrib/llvm/lib/Target/PowerPC/PPCInstrInfo.td stable/11/contrib/llvm/lib/Target/PowerPC/PPCSubtarget.cpp stable/11/contrib/llvm/lib/Target/Sparc/SparcRegisterInfo.cpp stable/11/contrib/llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp stable/11/contrib/llvm/lib/Target/X86/X86FastISel.cpp stable/11/contrib/llvm/lib/Target/X86/X86TargetMachine.cpp stable/11/contrib/llvm/tools/clang/lib/AST/MicrosoftMangle.cpp stable/11/contrib/llvm/tools/clang/lib/Basic/Version.cpp stable/11/contrib/llvm/tools/clang/lib/CodeGen/CGDebugInfo.cpp stable/11/contrib/llvm/tools/clang/lib/CodeGen/CGStmtOpenMP.cpp stable/11/contrib/llvm/tools/clang/lib/Driver/ToolChains/Arch/PPC.cpp stable/11/contrib/llvm/tools/clang/lib/Driver/ToolChains/Clang.cpp stable/11/contrib/llvm/tools/clang/lib/Driver/ToolChains/Linux.cpp stable/11/contrib/llvm/tools/clang/lib/Sema/SemaOpenMP.cpp stable/11/contrib/llvm/tools/lld/COFF/Writer.cpp stable/11/contrib/llvm/tools/lld/ELF/Arch/PPC64.cpp stable/11/contrib/llvm/tools/lld/ELF/InputSection.cpp stable/11/contrib/llvm/tools/lld/ELF/SyntheticSections.cpp stable/11/contrib/llvm/tools/lld/ELF/Writer.cpp stable/11/contrib/llvm/tools/llvm-objdump/llvm-objdump.cpp stable/11/contrib/openmp/runtime/src/kmp_atomic.h stable/11/contrib/openmp/runtime/src/kmp_csupport.cpp stable/11/contrib/openmp/runtime/src/ompt-specific.cpp stable/11/etc/mtree/BSD.debug.dist stable/11/etc/mtree/BSD.usr.dist stable/11/lib/clang/freebsd_cc_version.h stable/11/lib/clang/headers/Makefile stable/11/lib/clang/include/clang/Basic/Version.inc stable/11/lib/clang/include/clang/Config/config.h stable/11/lib/clang/include/lld/Common/Version.inc stable/11/lib/clang/include/llvm/Config/config.h stable/11/lib/clang/include/llvm/Config/llvm-config.h stable/11/lib/clang/include/llvm/Support/VCSRevision.h stable/11/lib/clang/libllvm/Makefile stable/11/lib/libclang_rt/Makefile.inc stable/11/tools/build/mk/OptionalObsoleteFiles.inc stable/11/usr.bin/clang/Makefile Directory Properties: stable/11/ (props changed) Modified: stable/11/ObsoleteFiles.inc ============================================================================== --- stable/11/ObsoleteFiles.inc Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/ObsoleteFiles.inc Tue Jul 23 20:31:54 2019 (r350259) @@ -38,6 +38,156 @@ # xargs -n1 | sort | uniq -d; # done +# 20190723: new clang import which bumps version from 8.0.0 to 8.0.1. +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/allocator_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/asan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/common_interface_defs.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/coverage_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/dfsan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/esan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/hwasan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/linux_syscall_hooks.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/lsan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/msan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/netbsd_syscall_hooks.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/scudo_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/tsan_interface.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sanitizer/tsan_interface_atomic.h +OLD_DIRS+=usr/lib/clang/8.0.0/include/sanitizer +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_builtin_vars.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_cmath.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_complex_builtins.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_device_functions.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_intrinsics.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_libdevice_declares.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_math_forward_declares.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__clang_cuda_runtime_wrapper.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__stddef_max_align_t.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__wmmintrin_aes.h +OLD_FILES+=usr/lib/clang/8.0.0/include/__wmmintrin_pclmul.h +OLD_FILES+=usr/lib/clang/8.0.0/include/adxintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/altivec.h +OLD_FILES+=usr/lib/clang/8.0.0/include/ammintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/arm64intr.h +OLD_FILES+=usr/lib/clang/8.0.0/include/arm_acle.h +OLD_FILES+=usr/lib/clang/8.0.0/include/arm_fp16.h +OLD_FILES+=usr/lib/clang/8.0.0/include/arm_neon.h +OLD_FILES+=usr/lib/clang/8.0.0/include/armintr.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx2intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512bitalgintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512bwintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512cdintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512dqintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512erintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512fintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512ifmaintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512ifmavlintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512pfintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vbmi2intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vbmiintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vbmivlintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlbitalgintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlbwintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlcdintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vldqintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlvbmi2intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vlvnniintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vnniintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vpopcntdqintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avx512vpopcntdqvlintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/avxintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/bmi2intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/bmiintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/cetintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/cldemoteintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/clflushoptintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/clwbintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/clzerointrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/cpuid.h +OLD_FILES+=usr/lib/clang/8.0.0/include/emmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/f16cintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/fma4intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/fmaintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/fxsrintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/gfniintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/htmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/htmxlintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/ia32intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/immintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/invpcidintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/lwpintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/lzcntintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/mm3dnow.h +OLD_FILES+=usr/lib/clang/8.0.0/include/mm_malloc.h +OLD_FILES+=usr/lib/clang/8.0.0/include/mmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/module.modulemap +OLD_FILES+=usr/lib/clang/8.0.0/include/movdirintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/msa.h +OLD_FILES+=usr/lib/clang/8.0.0/include/mwaitxintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/nmmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/opencl-c.h +OLD_FILES+=usr/lib/clang/8.0.0/include/pconfigintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/pkuintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/pmmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/popcntintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/prfchwintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/ptwriteintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/rdseedintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/rtmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/s390intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/sgxintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/shaintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/smmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/tbmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/tmmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/vadefs.h +OLD_FILES+=usr/lib/clang/8.0.0/include/vaesintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/vecintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/vpclmulqdqintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/waitpkgintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/wbnoinvdintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/wmmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/x86intrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xmmintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xopintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xsavecintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xsaveintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xsaveoptintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xsavesintrin.h +OLD_FILES+=usr/lib/clang/8.0.0/include/xtestintrin.h +OLD_DIRS+=usr/lib/clang/8.0.0/include +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-i386.so +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-preinit-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-preinit-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan-x86_64.so +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan_cxx-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.asan_cxx-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.msan-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.msan_cxx-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.profile-arm.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.profile-armhf.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.profile-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.profile-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.safestack-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.safestack-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.stats-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.stats-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.stats_client-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.stats_client-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.tsan-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.tsan_cxx-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_minimal-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_minimal-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_standalone-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_standalone-x86_64.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-i386.a +OLD_FILES+=usr/lib/clang/8.0.0/lib/freebsd/libclang_rt.ubsan_standalone_cxx-x86_64.a +OLD_DIRS+=usr/lib/clang/8.0.0/lib/freebsd +OLD_DIRS+=usr/lib/clang/8.0.0/lib +OLD_DIRS+=usr/lib/clang/8.0.0 # 20190416: new libc++ import which bumps version from 7.0.1 to 8.0.0. OLD_FILES+=usr/include/c++/v1/experimental/dynarray # 20190416: new clang import which bumps version from 7.0.1 to 8.0.0. Modified: stable/11/UPDATING ============================================================================== --- stable/11/UPDATING Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/UPDATING Tue Jul 23 20:31:54 2019 (r350259) @@ -16,6 +16,12 @@ from older versions of FreeBSD, try WITHOUT_CLANG and the tip of head, and then rebuild without this option. The bootstrap process from older version of current across the gcc/clang cutover is a bit fragile. +20190723: + Clang, llvm, lld, lldb, compiler-rt, libc++, libunwind and openmp have + been upgraded to 8.0.1. Please see the 20141231 entry below for + information about prerequisites and upgrading, if you are not already + using clang 3.5.0 or higher. + 20190426: CARP now sets DSCP value CS7(Network Traffic) in the flowlabel field of packets by default instead of only setting TOS_LOWDELAY in IPv4, Modified: stable/11/contrib/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_netbsd.cc ============================================================================== --- stable/11/contrib/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_netbsd.cc Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/compiler-rt/lib/sanitizer_common/sanitizer_platform_limits_netbsd.cc Tue Jul 23 20:31:54 2019 (r350259) @@ -124,7 +124,9 @@ #include <dev/isa/isvio.h> #include <dev/isa/wtreg.h> #include <dev/iscsi/iscsi_ioctl.h> +#if 0 #include <dev/nvmm/nvmm_ioctl.h> +#endif #include <dev/ofw/openfirmio.h> #include <dev/pci/amrio.h> #include <dev/pci/mlyreg.h> Modified: stable/11/contrib/libunwind/src/DwarfInstructions.hpp ============================================================================== --- stable/11/contrib/libunwind/src/DwarfInstructions.hpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/libunwind/src/DwarfInstructions.hpp Tue Jul 23 20:31:54 2019 (r350259) @@ -234,6 +234,31 @@ int DwarfInstructions<A, R>::stepWithDwarf(A &addressS } #endif +#if defined(_LIBUNWIND_TARGET_PPC64) +#define PPC64_ELFV1_R2_LOAD_INST_ENCODING 0xe8410028u // ld r2,40(r1) +#define PPC64_ELFV1_R2_OFFSET 40 +#define PPC64_ELFV2_R2_LOAD_INST_ENCODING 0xe8410018u // ld r2,24(r1) +#define PPC64_ELFV2_R2_OFFSET 24 + // If the instruction at return address is a TOC (r2) restore, + // then r2 was saved and needs to be restored. + // ELFv2 ABI specifies that the TOC Pointer must be saved at SP + 24, + // while in ELFv1 ABI it is saved at SP + 40. + if (R::getArch() == REGISTERS_PPC64 && returnAddress != 0) { + pint_t sp = newRegisters.getRegister(UNW_REG_SP); + pint_t r2 = 0; + switch (addressSpace.get32(returnAddress)) { + case PPC64_ELFV1_R2_LOAD_INST_ENCODING: + r2 = addressSpace.get64(sp + PPC64_ELFV1_R2_OFFSET); + break; + case PPC64_ELFV2_R2_LOAD_INST_ENCODING: + r2 = addressSpace.get64(sp + PPC64_ELFV2_R2_OFFSET); + break; + } + if (r2) + newRegisters.setRegister(UNW_PPC64_R2, r2); + } +#endif + // Return address is address after call site instruction, so setting IP to // that does simualates a return. newRegisters.setIP(returnAddress); Modified: stable/11/contrib/libunwind/src/UnwindRegistersRestore.S ============================================================================== --- stable/11/contrib/libunwind/src/UnwindRegistersRestore.S Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/libunwind/src/UnwindRegistersRestore.S Tue Jul 23 20:31:54 2019 (r350259) @@ -396,119 +396,119 @@ Lnovec: #elif defined(__ppc__) DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_ppc6jumptoEv) -; -; void libunwind::Registers_ppc::jumpto() -; -; On entry: -; thread_state pointer is in r3 -; +// +// void libunwind::Registers_ppc::jumpto() +// +// On entry: +// thread_state pointer is in r3 +// - ; restore integral registerrs - ; skip r0 for now - ; skip r1 for now - lwz r2, 16(r3) - ; skip r3 for now - ; skip r4 for now - ; skip r5 for now - lwz r6, 32(r3) - lwz r7, 36(r3) - lwz r8, 40(r3) - lwz r9, 44(r3) - lwz r10, 48(r3) - lwz r11, 52(r3) - lwz r12, 56(r3) - lwz r13, 60(r3) - lwz r14, 64(r3) - lwz r15, 68(r3) - lwz r16, 72(r3) - lwz r17, 76(r3) - lwz r18, 80(r3) - lwz r19, 84(r3) - lwz r20, 88(r3) - lwz r21, 92(r3) - lwz r22, 96(r3) - lwz r23,100(r3) - lwz r24,104(r3) - lwz r25,108(r3) - lwz r26,112(r3) - lwz r27,116(r3) - lwz r28,120(r3) - lwz r29,124(r3) - lwz r30,128(r3) - lwz r31,132(r3) + // restore integral registerrs + // skip r0 for now + // skip r1 for now + lwz %r2, 16(%r3) + // skip r3 for now + // skip r4 for now + // skip r5 for now + lwz %r6, 32(%r3) + lwz %r7, 36(%r3) + lwz %r8, 40(%r3) + lwz %r9, 44(%r3) + lwz %r10, 48(%r3) + lwz %r11, 52(%r3) + lwz %r12, 56(%r3) + lwz %r13, 60(%r3) + lwz %r14, 64(%r3) + lwz %r15, 68(%r3) + lwz %r16, 72(%r3) + lwz %r17, 76(%r3) + lwz %r18, 80(%r3) + lwz %r19, 84(%r3) + lwz %r20, 88(%r3) + lwz %r21, 92(%r3) + lwz %r22, 96(%r3) + lwz %r23,100(%r3) + lwz %r24,104(%r3) + lwz %r25,108(%r3) + lwz %r26,112(%r3) + lwz %r27,116(%r3) + lwz %r28,120(%r3) + lwz %r29,124(%r3) + lwz %r30,128(%r3) + lwz %r31,132(%r3) - ; restore float registers - lfd f0, 160(r3) - lfd f1, 168(r3) - lfd f2, 176(r3) - lfd f3, 184(r3) - lfd f4, 192(r3) - lfd f5, 200(r3) - lfd f6, 208(r3) - lfd f7, 216(r3) - lfd f8, 224(r3) - lfd f9, 232(r3) - lfd f10,240(r3) - lfd f11,248(r3) - lfd f12,256(r3) - lfd f13,264(r3) - lfd f14,272(r3) - lfd f15,280(r3) - lfd f16,288(r3) - lfd f17,296(r3) - lfd f18,304(r3) - lfd f19,312(r3) - lfd f20,320(r3) - lfd f21,328(r3) - lfd f22,336(r3) - lfd f23,344(r3) - lfd f24,352(r3) - lfd f25,360(r3) - lfd f26,368(r3) - lfd f27,376(r3) - lfd f28,384(r3) - lfd f29,392(r3) - lfd f30,400(r3) - lfd f31,408(r3) + // restore float registers + lfd %f0, 160(%r3) + lfd %f1, 168(%r3) + lfd %f2, 176(%r3) + lfd %f3, 184(%r3) + lfd %f4, 192(%r3) + lfd %f5, 200(%r3) + lfd %f6, 208(%r3) + lfd %f7, 216(%r3) + lfd %f8, 224(%r3) + lfd %f9, 232(%r3) + lfd %f10,240(%r3) + lfd %f11,248(%r3) + lfd %f12,256(%r3) + lfd %f13,264(%r3) + lfd %f14,272(%r3) + lfd %f15,280(%r3) + lfd %f16,288(%r3) + lfd %f17,296(%r3) + lfd %f18,304(%r3) + lfd %f19,312(%r3) + lfd %f20,320(%r3) + lfd %f21,328(%r3) + lfd %f22,336(%r3) + lfd %f23,344(%r3) + lfd %f24,352(%r3) + lfd %f25,360(%r3) + lfd %f26,368(%r3) + lfd %f27,376(%r3) + lfd %f28,384(%r3) + lfd %f29,392(%r3) + lfd %f30,400(%r3) + lfd %f31,408(%r3) - ; restore vector registers if any are in use - lwz r5,156(r3) ; test VRsave - cmpwi r5,0 - beq Lnovec + // restore vector registers if any are in use + lwz %r5, 156(%r3) // test VRsave + cmpwi %r5, 0 + beq Lnovec - subi r4,r1,16 - rlwinm r4,r4,0,0,27 ; mask low 4-bits - ; r4 is now a 16-byte aligned pointer into the red zone - ; the _vectorRegisters may not be 16-byte aligned so copy via red zone temp buffer + subi %r4, %r1, 16 + rlwinm %r4, %r4, 0, 0, 27 // mask low 4-bits + // r4 is now a 16-byte aligned pointer into the red zone + // the _vectorRegisters may not be 16-byte aligned so copy via red zone temp buffer + - #define LOAD_VECTOR_UNALIGNEDl(_index) \ - andis. r0,r5,(1<<(15-_index)) @\ - beq Ldone ## _index @\ - lwz r0, 424+_index*16(r3) @\ - stw r0, 0(r4) @\ - lwz r0, 424+_index*16+4(r3) @\ - stw r0, 4(r4) @\ - lwz r0, 424+_index*16+8(r3) @\ - stw r0, 8(r4) @\ - lwz r0, 424+_index*16+12(r3)@\ - stw r0, 12(r4) @\ - lvx v ## _index,0,r4 @\ -Ldone ## _index: + andis. %r0, %r5, (1<<(15-_index)) SEPARATOR \ + beq Ldone ## _index SEPARATOR \ + lwz %r0, 424+_index*16(%r3) SEPARATOR \ + stw %r0, 0(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+4(%r3) SEPARATOR \ + stw %r0, 4(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+8(%r3) SEPARATOR \ + stw %r0, 8(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+12(%r3) SEPARATOR \ + stw %r0, 12(%r4) SEPARATOR \ + lvx %v ## _index, 0, %r4 SEPARATOR \ + Ldone ## _index: #define LOAD_VECTOR_UNALIGNEDh(_index) \ - andi. r0,r5,(1<<(31-_index)) @\ - beq Ldone ## _index @\ - lwz r0, 424+_index*16(r3) @\ - stw r0, 0(r4) @\ - lwz r0, 424+_index*16+4(r3) @\ - stw r0, 4(r4) @\ - lwz r0, 424+_index*16+8(r3) @\ - stw r0, 8(r4) @\ - lwz r0, 424+_index*16+12(r3)@\ - stw r0, 12(r4) @\ - lvx v ## _index,0,r4 @\ - Ldone ## _index: + andi. %r0, %r5, (1<<(31-_index)) SEPARATOR \ + beq Ldone ## _index SEPARATOR \ + lwz %r0, 424+_index*16(%r3) SEPARATOR \ + stw %r0, 0(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+4(%r3) SEPARATOR \ + stw %r0, 4(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+8(%r3) SEPARATOR \ + stw %r0, 8(%r4) SEPARATOR \ + lwz %r0, 424+_index*16+12(%r3) SEPARATOR \ + stw %r0, 12(%r4) SEPARATOR \ + lvx %v ## _index, 0, %r4 SEPARATOR \ + Ldone ## _index: LOAD_VECTOR_UNALIGNEDl(0) @@ -545,17 +545,17 @@ Ldone ## _index: LOAD_VECTOR_UNALIGNEDh(31) Lnovec: - lwz r0, 136(r3) ; __cr - mtocrf 255,r0 - lwz r0, 148(r3) ; __ctr - mtctr r0 - lwz r0, 0(r3) ; __ssr0 - mtctr r0 - lwz r0, 8(r3) ; do r0 now - lwz r5,28(r3) ; do r5 now - lwz r4,24(r3) ; do r4 now - lwz r1,12(r3) ; do sp now - lwz r3,20(r3) ; do r3 last + lwz %r0, 136(%r3) // __cr + mtcr %r0 + lwz %r0, 148(%r3) // __ctr + mtctr %r0 + lwz %r0, 0(%r3) // __ssr0 + mtctr %r0 + lwz %r0, 8(%r3) // do r0 now + lwz %r5, 28(%r3) // do r5 now + lwz %r4, 24(%r3) // do r4 now + lwz %r1, 12(%r3) // do sp now + lwz %r3, 20(%r3) // do r3 last bctr #elif defined(__arm64__) || defined(__aarch64__) Modified: stable/11/contrib/libunwind/src/UnwindRegistersSave.S ============================================================================== --- stable/11/contrib/libunwind/src/UnwindRegistersSave.S Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/libunwind/src/UnwindRegistersSave.S Tue Jul 23 20:31:54 2019 (r350259) @@ -557,144 +557,144 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext) #elif defined(__ppc__) -; -; extern int unw_getcontext(unw_context_t* thread_state) -; -; On entry: -; thread_state pointer is in r3 -; +// +// extern int unw_getcontext(unw_context_t* thread_state) +// +// On entry: +// thread_state pointer is in r3 +// DEFINE_LIBUNWIND_FUNCTION(unw_getcontext) - stw r0, 8(r3) - mflr r0 - stw r0, 0(r3) ; store lr as ssr0 - stw r1, 12(r3) - stw r2, 16(r3) - stw r3, 20(r3) - stw r4, 24(r3) - stw r5, 28(r3) - stw r6, 32(r3) - stw r7, 36(r3) - stw r8, 40(r3) - stw r9, 44(r3) - stw r10, 48(r3) - stw r11, 52(r3) - stw r12, 56(r3) - stw r13, 60(r3) - stw r14, 64(r3) - stw r15, 68(r3) - stw r16, 72(r3) - stw r17, 76(r3) - stw r18, 80(r3) - stw r19, 84(r3) - stw r20, 88(r3) - stw r21, 92(r3) - stw r22, 96(r3) - stw r23,100(r3) - stw r24,104(r3) - stw r25,108(r3) - stw r26,112(r3) - stw r27,116(r3) - stw r28,120(r3) - stw r29,124(r3) - stw r30,128(r3) - stw r31,132(r3) + stw %r0, 8(%r3) + mflr %r0 + stw %r0, 0(%r3) // store lr as ssr0 + stw %r1, 12(%r3) + stw %r2, 16(%r3) + stw %r3, 20(%r3) + stw %r4, 24(%r3) + stw %r5, 28(%r3) + stw %r6, 32(%r3) + stw %r7, 36(%r3) + stw %r8, 40(%r3) + stw %r9, 44(%r3) + stw %r10, 48(%r3) + stw %r11, 52(%r3) + stw %r12, 56(%r3) + stw %r13, 60(%r3) + stw %r14, 64(%r3) + stw %r15, 68(%r3) + stw %r16, 72(%r3) + stw %r17, 76(%r3) + stw %r18, 80(%r3) + stw %r19, 84(%r3) + stw %r20, 88(%r3) + stw %r21, 92(%r3) + stw %r22, 96(%r3) + stw %r23,100(%r3) + stw %r24,104(%r3) + stw %r25,108(%r3) + stw %r26,112(%r3) + stw %r27,116(%r3) + stw %r28,120(%r3) + stw %r29,124(%r3) + stw %r30,128(%r3) + stw %r31,132(%r3) - ; save VRSave register - mfspr r0,256 - stw r0,156(r3) - ; save CR registers - mfcr r0 - stw r0,136(r3) - ; save CTR register - mfctr r0 - stw r0,148(r3) + // save VRSave register + mfspr %r0, 256 + stw %r0, 156(%r3) + // save CR registers + mfcr %r0 + stw %r0, 136(%r3) + // save CTR register + mfctr %r0 + stw %r0, 148(%r3) - ; save float registers - stfd f0, 160(r3) - stfd f1, 168(r3) - stfd f2, 176(r3) - stfd f3, 184(r3) - stfd f4, 192(r3) - stfd f5, 200(r3) - stfd f6, 208(r3) - stfd f7, 216(r3) - stfd f8, 224(r3) - stfd f9, 232(r3) - stfd f10,240(r3) - stfd f11,248(r3) - stfd f12,256(r3) - stfd f13,264(r3) - stfd f14,272(r3) - stfd f15,280(r3) - stfd f16,288(r3) - stfd f17,296(r3) - stfd f18,304(r3) - stfd f19,312(r3) - stfd f20,320(r3) - stfd f21,328(r3) - stfd f22,336(r3) - stfd f23,344(r3) - stfd f24,352(r3) - stfd f25,360(r3) - stfd f26,368(r3) - stfd f27,376(r3) - stfd f28,384(r3) - stfd f29,392(r3) - stfd f30,400(r3) - stfd f31,408(r3) + // save float registers + stfd %f0, 160(%r3) + stfd %f1, 168(%r3) + stfd %f2, 176(%r3) + stfd %f3, 184(%r3) + stfd %f4, 192(%r3) + stfd %f5, 200(%r3) + stfd %f6, 208(%r3) + stfd %f7, 216(%r3) + stfd %f8, 224(%r3) + stfd %f9, 232(%r3) + stfd %f10,240(%r3) + stfd %f11,248(%r3) + stfd %f12,256(%r3) + stfd %f13,264(%r3) + stfd %f14,272(%r3) + stfd %f15,280(%r3) + stfd %f16,288(%r3) + stfd %f17,296(%r3) + stfd %f18,304(%r3) + stfd %f19,312(%r3) + stfd %f20,320(%r3) + stfd %f21,328(%r3) + stfd %f22,336(%r3) + stfd %f23,344(%r3) + stfd %f24,352(%r3) + stfd %f25,360(%r3) + stfd %f26,368(%r3) + stfd %f27,376(%r3) + stfd %f28,384(%r3) + stfd %f29,392(%r3) + stfd %f30,400(%r3) + stfd %f31,408(%r3) - ; save vector registers + // save vector registers - subi r4,r1,16 - rlwinm r4,r4,0,0,27 ; mask low 4-bits - ; r4 is now a 16-byte aligned pointer into the red zone + subi %r4, %r1, 16 + rlwinm %r4, %r4, 0, 0, 27 // mask low 4-bits + // r4 is now a 16-byte aligned pointer into the red zone #define SAVE_VECTOR_UNALIGNED(_vec, _offset) \ - stvx _vec,0,r4 @\ - lwz r5, 0(r4) @\ - stw r5, _offset(r3) @\ - lwz r5, 4(r4) @\ - stw r5, _offset+4(r3) @\ - lwz r5, 8(r4) @\ - stw r5, _offset+8(r3) @\ - lwz r5, 12(r4) @\ - stw r5, _offset+12(r3) + stvx _vec, 0, %r4 SEPARATOR \ + lwz %r5, 0(%r4) SEPARATOR \ + stw %r5, _offset(%r3) SEPARATOR \ + lwz %r5, 4(%r4) SEPARATOR \ + stw %r5, _offset+4(%r3) SEPARATOR \ + lwz %r5, 8(%r4) SEPARATOR \ + stw %r5, _offset+8(%r3) SEPARATOR \ + lwz %r5, 12(%r4) SEPARATOR \ + stw %r5, _offset+12(%r3) - SAVE_VECTOR_UNALIGNED( v0, 424+0x000) - SAVE_VECTOR_UNALIGNED( v1, 424+0x010) - SAVE_VECTOR_UNALIGNED( v2, 424+0x020) - SAVE_VECTOR_UNALIGNED( v3, 424+0x030) - SAVE_VECTOR_UNALIGNED( v4, 424+0x040) - SAVE_VECTOR_UNALIGNED( v5, 424+0x050) - SAVE_VECTOR_UNALIGNED( v6, 424+0x060) - SAVE_VECTOR_UNALIGNED( v7, 424+0x070) - SAVE_VECTOR_UNALIGNED( v8, 424+0x080) - SAVE_VECTOR_UNALIGNED( v9, 424+0x090) - SAVE_VECTOR_UNALIGNED(v10, 424+0x0A0) - SAVE_VECTOR_UNALIGNED(v11, 424+0x0B0) - SAVE_VECTOR_UNALIGNED(v12, 424+0x0C0) - SAVE_VECTOR_UNALIGNED(v13, 424+0x0D0) - SAVE_VECTOR_UNALIGNED(v14, 424+0x0E0) - SAVE_VECTOR_UNALIGNED(v15, 424+0x0F0) - SAVE_VECTOR_UNALIGNED(v16, 424+0x100) - SAVE_VECTOR_UNALIGNED(v17, 424+0x110) - SAVE_VECTOR_UNALIGNED(v18, 424+0x120) - SAVE_VECTOR_UNALIGNED(v19, 424+0x130) - SAVE_VECTOR_UNALIGNED(v20, 424+0x140) - SAVE_VECTOR_UNALIGNED(v21, 424+0x150) - SAVE_VECTOR_UNALIGNED(v22, 424+0x160) - SAVE_VECTOR_UNALIGNED(v23, 424+0x170) - SAVE_VECTOR_UNALIGNED(v24, 424+0x180) - SAVE_VECTOR_UNALIGNED(v25, 424+0x190) - SAVE_VECTOR_UNALIGNED(v26, 424+0x1A0) - SAVE_VECTOR_UNALIGNED(v27, 424+0x1B0) - SAVE_VECTOR_UNALIGNED(v28, 424+0x1C0) - SAVE_VECTOR_UNALIGNED(v29, 424+0x1D0) - SAVE_VECTOR_UNALIGNED(v30, 424+0x1E0) - SAVE_VECTOR_UNALIGNED(v31, 424+0x1F0) + SAVE_VECTOR_UNALIGNED( %v0, 424+0x000) + SAVE_VECTOR_UNALIGNED( %v1, 424+0x010) + SAVE_VECTOR_UNALIGNED( %v2, 424+0x020) + SAVE_VECTOR_UNALIGNED( %v3, 424+0x030) + SAVE_VECTOR_UNALIGNED( %v4, 424+0x040) + SAVE_VECTOR_UNALIGNED( %v5, 424+0x050) + SAVE_VECTOR_UNALIGNED( %v6, 424+0x060) + SAVE_VECTOR_UNALIGNED( %v7, 424+0x070) + SAVE_VECTOR_UNALIGNED( %v8, 424+0x080) + SAVE_VECTOR_UNALIGNED( %v9, 424+0x090) + SAVE_VECTOR_UNALIGNED(%v10, 424+0x0A0) + SAVE_VECTOR_UNALIGNED(%v11, 424+0x0B0) + SAVE_VECTOR_UNALIGNED(%v12, 424+0x0C0) + SAVE_VECTOR_UNALIGNED(%v13, 424+0x0D0) + SAVE_VECTOR_UNALIGNED(%v14, 424+0x0E0) + SAVE_VECTOR_UNALIGNED(%v15, 424+0x0F0) + SAVE_VECTOR_UNALIGNED(%v16, 424+0x100) + SAVE_VECTOR_UNALIGNED(%v17, 424+0x110) + SAVE_VECTOR_UNALIGNED(%v18, 424+0x120) + SAVE_VECTOR_UNALIGNED(%v19, 424+0x130) + SAVE_VECTOR_UNALIGNED(%v20, 424+0x140) + SAVE_VECTOR_UNALIGNED(%v21, 424+0x150) + SAVE_VECTOR_UNALIGNED(%v22, 424+0x160) + SAVE_VECTOR_UNALIGNED(%v23, 424+0x170) + SAVE_VECTOR_UNALIGNED(%v24, 424+0x180) + SAVE_VECTOR_UNALIGNED(%v25, 424+0x190) + SAVE_VECTOR_UNALIGNED(%v26, 424+0x1A0) + SAVE_VECTOR_UNALIGNED(%v27, 424+0x1B0) + SAVE_VECTOR_UNALIGNED(%v28, 424+0x1C0) + SAVE_VECTOR_UNALIGNED(%v29, 424+0x1D0) + SAVE_VECTOR_UNALIGNED(%v30, 424+0x1E0) + SAVE_VECTOR_UNALIGNED(%v31, 424+0x1F0) - li r3, 0 ; return UNW_ESUCCESS + li %r3, 0 // return UNW_ESUCCESS blr Modified: stable/11/contrib/libunwind/src/assembly.h ============================================================================== --- stable/11/contrib/libunwind/src/assembly.h Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/libunwind/src/assembly.h Tue Jul 23 20:31:54 2019 (r350259) @@ -29,14 +29,26 @@ #ifdef _ARCH_PWR8 #define PPC64_HAS_VMX #endif -#elif defined(__POWERPC__) || defined(__powerpc__) || defined(__ppc__) -#define SEPARATOR @ #elif defined(__arm64__) #define SEPARATOR %% #else #define SEPARATOR ; #endif +#if defined(__powerpc64__) && (!defined(_CALL_ELF) || _CALL_ELF == 1) +#define PPC64_OPD1 .section .opd,"aw",@progbits SEPARATOR +#define PPC64_OPD2 SEPARATOR \ + .p2align 3 SEPARATOR \ + .quad .Lfunc_begin0 SEPARATOR \ + .quad .TOC.@tocbase SEPARATOR \ + .quad 0 SEPARATOR \ + .text SEPARATOR \ +.Lfunc_begin0: +#else +#define PPC64_OPD1 +#define PPC64_OPD2 +#endif + #define GLUE2(a, b) a ## b #define GLUE(a, b) GLUE2(a, b) #define SYMBOL_NAME(name) GLUE(__USER_LABEL_PREFIX__, name) @@ -97,13 +109,17 @@ .globl SYMBOL_NAME(name) SEPARATOR \ EXPORT_SYMBOL(name) SEPARATOR \ SYMBOL_IS_FUNC(SYMBOL_NAME(name)) SEPARATOR \ - SYMBOL_NAME(name): + PPC64_OPD1 \ + SYMBOL_NAME(name): \ + PPC64_OPD2 #define DEFINE_LIBUNWIND_PRIVATE_FUNCTION(name) \ .globl SYMBOL_NAME(name) SEPARATOR \ HIDDEN_SYMBOL(SYMBOL_NAME(name)) SEPARATOR \ SYMBOL_IS_FUNC(SYMBOL_NAME(name)) SEPARATOR \ - SYMBOL_NAME(name): + PPC64_OPD1 \ + SYMBOL_NAME(name): \ + PPC64_OPD2 #if defined(__arm__) #if !defined(__ARM_ARCH) Modified: stable/11/contrib/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp ============================================================================== --- stable/11/contrib/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/DebugInfo/DWARF/DWARFDebugFrame.cpp Tue Jul 23 20:31:54 2019 (r350259) @@ -301,7 +301,7 @@ void CIE::dump(raw_ostream &OS, const MCRegisterInfo * OS << format(" Data alignment factor: %d\n", (int32_t)DataAlignmentFactor); OS << format(" Return address column: %d\n", (int32_t)ReturnAddressRegister); if (Personality) - OS << format(" Personality Address: %08x\n", *Personality); + OS << format(" Personality Address: %016" PRIx64 "\n", *Personality); if (!AugmentationData.empty()) { OS << " Augmentation data: "; for (uint8_t Byte : AugmentationData) @@ -320,7 +320,7 @@ void FDE::dump(raw_ostream &OS, const MCRegisterInfo * (uint32_t)InitialLocation, (uint32_t)InitialLocation + (uint32_t)AddressRange); if (LSDAAddress) - OS << format(" LSDA Address: %08x\n", *LSDAAddress); + OS << format(" LSDA Address: %016" PRIx64 "\n", *LSDAAddress); CFIs.dump(OS, MRI, IsEH); OS << "\n"; } Modified: stable/11/contrib/llvm/lib/MC/ELFObjectWriter.cpp ============================================================================== --- stable/11/contrib/llvm/lib/MC/ELFObjectWriter.cpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/MC/ELFObjectWriter.cpp Tue Jul 23 20:31:54 2019 (r350259) @@ -1271,6 +1271,7 @@ void ELFObjectWriter::executePostLayoutBinding(MCAssem // This is the first place we are able to copy this information. Alias->setExternal(Symbol.isExternal()); Alias->setBinding(Symbol.getBinding()); + Alias->setOther(Symbol.getOther()); if (!Symbol.isUndefined() && !Rest.startswith("@@@")) continue; Modified: stable/11/contrib/llvm/lib/MC/MCWin64EH.cpp ============================================================================== --- stable/11/contrib/llvm/lib/MC/MCWin64EH.cpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/MC/MCWin64EH.cpp Tue Jul 23 20:31:54 2019 (r350259) @@ -522,7 +522,7 @@ static void ARM64EmitUnwindInfo(MCStreamer &streamer, if (MatchingEpilog) { assert(EpilogInfo.find(MatchingEpilog) != EpilogInfo.end() && "Duplicate epilog not found"); - EpilogInfo[EpilogStart] = EpilogInfo[MatchingEpilog]; + EpilogInfo[EpilogStart] = EpilogInfo.lookup(MatchingEpilog); // Clear the unwind codes in the EpilogMap, so that they don't get output // in the logic below. EpilogInstrs.clear(); Modified: stable/11/contrib/llvm/lib/MC/WasmObjectWriter.cpp ============================================================================== --- stable/11/contrib/llvm/lib/MC/WasmObjectWriter.cpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/MC/WasmObjectWriter.cpp Tue Jul 23 20:31:54 2019 (r350259) @@ -368,7 +368,13 @@ void WasmObjectWriter::startCustomSection(SectionBookk // Now that the section is complete and we know how big it is, patch up the // section size field at the start of the section. void WasmObjectWriter::endSection(SectionBookkeeping &Section) { - uint64_t Size = W.OS.tell() - Section.PayloadOffset; + uint64_t Size = W.OS.tell(); + // /dev/null doesn't support seek/tell and can report offset of 0. + // Simply skip this patching in that case. + if (!Size) + return; + + Size -= Section.PayloadOffset; if (uint32_t(Size) != Size) report_fatal_error("section size does not fit in a uint32_t"); Modified: stable/11/contrib/llvm/lib/Object/COFFImportFile.cpp ============================================================================== --- stable/11/contrib/llvm/lib/Object/COFFImportFile.cpp Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/Object/COFFImportFile.cpp Tue Jul 23 20:31:54 2019 (r350259) @@ -496,7 +496,7 @@ NewArchiveMember ObjectFactory::createWeakExternal(Str // COFF Header coff_file_header Header{ - u16(0), + u16(Machine), u16(NumberOfSections), u32(0), u32(sizeof(Header) + (NumberOfSections * sizeof(coff_section))), Modified: stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td ============================================================================== --- stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedExynosM4.td Tue Jul 23 20:31:54 2019 (r350259) @@ -239,7 +239,6 @@ def M4WriteNEONK : SchedWriteRes<[M4UnitNSHF, M4UnitS0]> { let Latency = 5; let NumMicroOps = 2; } def M4WriteNEONL : SchedWriteRes<[M4UnitNMUL]> { let Latency = 3; } -def M4WriteNEONM : SchedWriteRes<[M4UnitNMUL]> { let Latency = 3; } def M4WriteNEONN : SchedWriteRes<[M4UnitNMSC, M4UnitNMSC]> { let Latency = 5; let NumMicroOps = 2; } @@ -480,8 +479,6 @@ def M4WriteCOPY : SchedWriteVariant<[SchedVar<Exyno SchedVar<NoSchedPred, [M4WriteZ0]>]>; def M4WriteMOVI : SchedWriteVariant<[SchedVar<IsZeroFPIdiomPred, [M4WriteZ0]>, SchedVar<NoSchedPred, [M4WriteNALU1]>]>; -def M4WriteMULL : SchedWriteVariant<[SchedVar<ExynosLongVectorUpperPred, [M4WriteNEONM]>, - SchedVar<NoSchedPred, [M4WriteNMUL3]>]>; // Fast forwarding. def M4ReadAESM1 : SchedReadAdvance<+1, [M4WriteNCRY1]>; @@ -489,8 +486,9 @@ def M4ReadFMACM1 : SchedReadAdvance<+1, [M4WriteFMAC M4WriteFMAC4H, M4WriteFMAC5]>; def M4ReadNMULM1 : SchedReadAdvance<+1, [M4WriteNMUL3]>; -def M4ReadMULLP2 : SchedReadAdvance<-2, [M4WriteNEONM]>; +def M4ReadNMULP2 : SchedReadAdvance<-2, [M4WriteNMUL3]>; + //===----------------------------------------------------------------------===// // Coarse scheduling model. @@ -662,10 +660,8 @@ def : InstRW<[M4WriteNEONK], (instregex "^FMOVDXHighr def : InstRW<[M4WriteFCVT3H], (instregex "^F(RECP|RSQRT)Ev1f16")>; def : InstRW<[M4WriteFCVT3], (instregex "^F(RECP|RSQRT)Ev1i(32|64)")>; def : InstRW<[M4WriteNMSC1], (instregex "^FRECPXv1")>; -def : InstRW<[M4WriteFMAC4H, - M4ReadFMACM1], (instregex "^F(RECP|RSQRT)S16")>; -def : InstRW<[M4WriteFMAC4, - M4ReadFMACM1], (instregex "^F(RECP|RSQRT)S(32|64)")>; +def : InstRW<[M4WriteFMAC4H], (instregex "^F(RECP|RSQRT)S16")>; +def : InstRW<[M4WriteFMAC4], (instregex "^F(RECP|RSQRT)S(32|64)")>; // FP load instructions. def : InstRW<[WriteVLD], (instregex "^LDR[SDQ]l")>; @@ -736,14 +732,20 @@ def : InstRW<[M4WriteNALU1], (instregex "^(AND|BIC|EO def : InstRW<[M4WriteNMSC1], (instregex "^[SU](MIN|MAX)v")>; def : InstRW<[M4WriteNMSC2], (instregex "^[SU](MIN|MAX)Pv")>; def : InstRW<[M4WriteNHAD3], (instregex "^[SU](MIN|MAX)Vv")>; -def : InstRW<[M4WriteNMUL3], (instregex "^(SQR?D)?MULH?v")>; def : InstRW<[M4WriteNMUL3, M4ReadNMULM1], (instregex "^ML[AS]v")>; -def : InstRW<[M4WriteNMUL3], (instregex "^SQRDML[AS]H")>; -def : InstRW<[M4WriteMULL, - M4ReadMULLP2], (instregex "^(S|U|SQD)ML[AS]Lv")>; -def : InstRW<[M4WriteMULL, - M4ReadMULLP2], (instregex "^(S|U|SQD)MULLv")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULM1], (instregex "^(SQR?D)?MULH?v")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULM1], (instregex "^SQRDML[AS]H")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULM1], (instregex "^(S|U|SQD)ML[AS]L(v1(i32|i64)|v2i32|v4i16|v8i8)")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULP2], (instregex "^(S|U|SQD)ML[AS]L(v4i32|v8i16|v16i8)")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULM1], (instregex "^(S|U|SQD)MULL(v1(i32|i64)|v2i32|v4i16|v8i8)")>; +def : InstRW<[M4WriteNMUL3, + M4ReadNMULP2], (instregex "^(S|U|SQD)MULL(v4i32|v8i16|v16i8)")>; def : InstRW<[M4WriteNMUL3], (instregex "^[SU]DOT(lane)?v")>; def : InstRW<[M4WriteNHAD3], (instregex "^[SU]ADALPv")>; def : InstRW<[M4WriteNSHT4A], (instregex "^[SU]R?SRA[dv]")>; @@ -808,10 +810,8 @@ def : InstRW<[M4WriteNALU1], (instregex "^FMOVv.f(32| def : InstRW<[M4WriteFCVT3H], (instregex "^F(RECP|RSQRT)Ev[248]f16")>; def : InstRW<[M4WriteFCVT3], (instregex "^F(RECP|RSQRT)Ev[248]f(32|64)")>; def : InstRW<[M4WriteFCVT3], (instregex "^U(RECP|RSQRT)Ev[24]i32")>; -def : InstRW<[M4WriteFMAC4H, - M4ReadFMACM1], (instregex "^F(RECP|RSQRT)Sv.f16")>; -def : InstRW<[M4WriteFMAC4, - M4ReadFMACM1], (instregex "^F(RECP|RSQRT)Sv.f(32|64)")>; +def : InstRW<[M4WriteFMAC4H], (instregex "^F(RECP|RSQRT)Sv.f16")>; +def : InstRW<[M4WriteFMAC4], (instregex "^F(RECP|RSQRT)Sv.f(32|64)")>; def : InstRW<[M4WriteNSHF1], (instregex "^REV(16|32|64)v")>; def : InstRW<[M4WriteNSHFA], (instregex "^TB[LX]v(8|16)i8One")>; def : InstRW<[M4WriteNSHFB], (instregex "^TB[LX]v(8|16)i8Two")>; Modified: stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td ============================================================================== --- stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredExynos.td Tue Jul 23 20:31:54 2019 (r350259) @@ -103,17 +103,6 @@ def ExynosScaledIdxPred : MCSchedPredicate<ExynosScale // Identify FP instructions. def ExynosFPPred : MCSchedPredicate<CheckAny<[CheckDForm, CheckQForm]>>; -// Identify whether an instruction whose result is a long vector -// operates on the upper half of the input registers. -def ExynosLongVectorUpperFn : TIIPredicate< - "isExynosLongVectorUpper", - MCOpcodeSwitchStatement< - [MCOpcodeSwitchCase< - IsLongVectorUpperOp.ValidOpcodes, - MCReturnStatement<TruePred>>], - MCReturnStatement<FalsePred>>>; -def ExynosLongVectorUpperPred : MCSchedPredicate<ExynosLongVectorUpperFn>; - // Identify 128-bit NEON instructions. def ExynosQFormPred : MCSchedPredicate<CheckQForm>; Modified: stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredicates.td ============================================================================== --- stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredicates.td Tue Jul 23 20:28:29 2019 (r350258) +++ stable/11/contrib/llvm/lib/Target/AArch64/AArch64SchedPredicates.td Tue Jul 23 20:31:54 2019 (r350259) @@ -268,59 +268,6 @@ def IsStoreRegOffsetOp : CheckOpcode<[STRBBroW, ST def IsLoadStoreRegOffsetOp : CheckOpcode<!listconcat(IsLoadRegOffsetOp.ValidOpcodes, IsStoreRegOffsetOp.ValidOpcodes)>; -// Identify whether an instruction whose result is a long vector -// operates on the upper half of the input registers. -def IsLongVectorUpperOp : CheckOpcode<[FCVTLv8i16, FCVTLv4i32, - FCVTNv8i16, FCVTNv4i32, - FCVTXNv4f32, - PMULLv16i8, PMULLv2i64, - RADDHNv8i16_v16i8, RADDHNv4i32_v8i16, RADDHNv2i64_v4i32, - RSHRNv16i8_shift, RSHRNv8i16_shift, RSHRNv4i32_shift, - RSUBHNv8i16_v16i8, RSUBHNv4i32_v8i16, RSUBHNv2i64_v4i32, - SABALv16i8_v8i16, SABALv8i16_v4i32, SABALv4i32_v2i64, - SABDLv16i8_v8i16, SABDLv8i16_v4i32, SABDLv4i32_v2i64, - SADDLv16i8_v8i16, SADDLv8i16_v4i32, SADDLv4i32_v2i64, - SADDWv16i8_v8i16, SADDWv8i16_v4i32, SADDWv4i32_v2i64, - SHLLv16i8, SHLLv8i16, SHLLv4i32, - SHRNv16i8_shift, SHRNv8i16_shift, SHRNv4i32_shift, - SMLALv16i8_v8i16, SMLALv8i16_v4i32, SMLALv4i32_v2i64, - SMLALv8i16_indexed, SMLALv4i32_indexed, - SMLSLv16i8_v8i16, SMLSLv8i16_v4i32, SMLSLv4i32_v2i64, - SMLSLv8i16_indexed, SMLSLv4i32_indexed, - SMULLv16i8_v8i16, SMULLv8i16_v4i32, SMULLv4i32_v2i64, *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***
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