Date: Mon, 24 Apr 2006 21:17:02 +0000 (UTC) From: Colin Percival <cperciva@FreeBSD.org> To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org Subject: cvs commit: src/sys/amd64/amd64 mp_machdep.c src/sys/i386/i386 mp_machdep.c Message-ID: <200604242117.k3OLH2RG032117@repoman.freebsd.org>
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cperciva 2006-04-24 21:17:02 UTC
FreeBSD src repository
Modified files:
sys/amd64/amd64 mp_machdep.c
sys/i386/i386 mp_machdep.c
Log:
Adjust dangerous-shared-cache-detection logic from "all shared data
caches are dangerous" to "a shared L1 data cache is dangerous". This
is a compromise between paranoia and performance: Unlike the L1 cache,
nobody has publicly demonstrated a cryptographic side channel which
exploits the L2 cache -- this is harder due to the larger size, lower
bandwidth, and greater associativity -- and prohibiting shared L2
caches turns Intel Core Duo processors into Intel Core Solo processors.
As before, the 'machdep.hyperthreading_allowed' sysctl will allow even
the L1 data cache to be shared.
Discussed with: jhb, scottl
Security: See FreeBSD-SA-05:09.htt for background material.
Revision Changes Path
1.272 +2 -2 src/sys/amd64/amd64/mp_machdep.c
1.265 +2 -2 src/sys/i386/i386/mp_machdep.c
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