Date: Thu, 15 Mar 2018 22:51:13 +0000 (UTC) From: Marius Strobl <marius@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r331033 - stable/10/sys/dev/sdhci Message-ID: <201803152251.w2FMpDG5068787@repo.freebsd.org>
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Author: marius Date: Thu Mar 15 22:51:13 2018 New Revision: 331033 URL: https://svnweb.freebsd.org/changeset/base/331033 Log: MFC: r327315 Add quirks for Intel Denverton eMMC 5.0 controllers. Modified: stable/10/sys/dev/sdhci/sdhci_pci.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/sdhci/sdhci_pci.c ============================================================================== --- stable/10/sys/dev/sdhci/sdhci_pci.c Thu Mar 15 22:51:10 2018 (r331032) +++ stable/10/sys/dev/sdhci/sdhci_pci.c Thu Mar 15 22:51:13 2018 (r331033) @@ -118,6 +118,12 @@ static const struct sdhci_device { SDHCI_QUIRK_MMC_DDR52 | SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 | SDHCI_QUIRK_PRESET_VALUE_BROKEN }, + { 0x19db8086, 0xffff, "Intel Denverton eMMC 5.0 Controller", + SDHCI_QUIRK_INTEL_POWER_UP_RESET | + SDHCI_QUIRK_WAIT_WHILE_BUSY | + SDHCI_QUIRK_MMC_DDR52 | + SDHCI_QUIRK_CAPS_BIT63_FOR_MMC_HS400 | + SDHCI_QUIRK_PRESET_VALUE_BROKEN }, { 0x22948086, 0xffff, "Intel Braswell eMMC 4.5.1 Controller", SDHCI_QUIRK_DATA_TIMEOUT_1MHZ | SDHCI_QUIRK_INTEL_POWER_UP_RESET |
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