From owner-freebsd-multimedia Mon May 19 01:36:47 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.5/8.8.5) id BAA10019 for multimedia-outgoing; Mon, 19 May 1997 01:36:47 -0700 (PDT) Received: from labinfo.iet.unipi.it (labinfo.iet.unipi.it [131.114.9.5]) by hub.freebsd.org (8.8.5/8.8.5) with SMTP id BAA09938 for ; Mon, 19 May 1997 01:35:23 -0700 (PDT) Received: from localhost (luigi@localhost) by labinfo.iet.unipi.it (8.6.5/8.6.5) id JAA04171; Mon, 19 May 1997 09:53:17 +0200 From: Luigi Rizzo Message-Id: <199705190753.JAA04171@labinfo.iet.unipi.it> Subject: Re: any other Wincast/mono owners out there? (+ STB WinTV not keeping sync?) To: hasty@rah.star-gate.com (Amancio Hasty) Date: Mon, 19 May 1997 09:53:17 +0200 (MET DST) Cc: bad@uhf.wireless.net, multimedia@FreeBSD.ORG In-Reply-To: <199705190725.AAA01381@rah.star-gate.com> from "Amancio Hasty" at May 19, 97 00:24:52 am X-Mailer: ELM [version 2.4 PL23] Content-Type: text Sender: owner-multimedia@FreeBSD.ORG X-Loop: FreeBSD.org Precedence: bulk > >From The Desk Of Luigi Rizzo : > > > > Also, I am a bit uncertain if BT848_ADC_CRUSH should really be used > > there, because it adds a sort of AGC which (apparently at least) only > > works in the direction of reducing sensitivity. > > Well, lets be a bit more certain here 8) > > Investigate, experiment and please let us know what you find out;specially > since you are using PAL. What I did was to provide a different mode in addition to NTSC & PAL, which would grab only the top 32 lines (VBI) (I know there is a better way, i.e. program the Bt848 to grab the VBI lines only etc. etc., but I was uncertain on how to actually use this, if a reprogram of the DMA was necessary or not. It appears that, when setting CRUSH, the vertical gain is reduced on occurrence of ADC overflows, and the image becomes dimmer and dimmer as time goes by. This seems consistent with what is reported on the manpage for the ADC interface register, which does not mention the possibility of increasing the gain back again (nor it could, since the mechanism is driven by ADC overflows and there is no inverse condition). I think a good default for this register is 0xC0 corresponding to the SYNC_T bit set only (plus the reserved one). I don't think it's a PAL issue. Cheers Luigi -----------------------------+-------------------------------------- Luigi Rizzo | Dip. di Ingegneria dell'Informazione email: luigi@iet.unipi.it | Universita' di Pisa tel: +39-50-568533 | via Diotisalvi 2, 56126 PISA (Italy) fax: +39-50-568522 | http://www.iet.unipi.it/~luigi/ _____________________________|______________________________________