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Date:      Tue, 18 Dec 2001 19:23:14 +0100
From:      Thomas Moestl <tmoestl@gmx.net>
To:        Warner Losh <imp@harmony.village.org>
Cc:        Mike Smith <msmith@FreeBSD.ORG>, arch@FreeBSD.ORG
Subject:   Re: Please review: changes to MI bus code for sparc64
Message-ID:  <20011218192314.A441@crow.dom2ip.de>
In-Reply-To: <200112180220.fBI2K5M81153@harmony.village.org>; from imp@harmony.village.org on Mon, Dec 17, 2001 at 07:20:05PM -0700
References:  <20011216023321.C458@crow.dom2ip.de> <tmoestl@gmx.net> <200112140028.fBE0Sol04630@mass.dis.org> <20011216023321.C458@crow.dom2ip.de> <200112180220.fBI2K5M81153@harmony.village.org>

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On Mon, 2001/12/17 at 19:20:05 -0700, Warner Losh wrote:
> In message <20011216023321.C458@crow.dom2ip.de> Thomas Moestl writes:
> : - remove PCI_INTLINE_0_BAD
> : - move the code for PCI_BROKEN_INTPIN to MD code, and use a quirk
> :   table to identify the devices that need this fixup (I don't really
> :   like this change, as I think it is not totally unlikely that the
> :   device in question may also be used for other architectures; it is
> :   not really specific to sparc64)
> 
> I didn't see this in the patch...

These are the deltas against the previous patch that would add these
two options.
The change to sparc64 MD code I mentioned are also not present in the
patch. It just adds check for every config space access to the intpin
register returning 0 that looks up the device in a quirk table, and
will return a (bogus) value of 1 if the device is found to be quirky
(the value does not matter since the interrupt is alredy routed for
these devices).

	- thomas

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