Date: Fri, 14 Feb 2003 15:38:04 -0800 (PST) From: Marcel Moolenaar <marcel@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 25185 for review Message-ID: <200302142338.h1ENc4k0008977@repoman.freebsd.org>
next in thread | raw e-mail | index | archive | help
http://perforce.freebsd.org/chv.cgi?CH=25185 Change 25185 by marcel@marcel_nfs on 2003/02/14 15:37:57 Converge on using the register sets. This change has high impact and high risk and as committed this change is incomplete. This branch is therefore unbuildable right now (kernel, that is. userland is just unrunnable :-) The prime advantage of using the register sets is that it moves us away from the individual registers and thus makes saving, restoring and copying registers a more managaeble task at the cost of some inconvience when one actual has to get to a specific register (which set?). The use of arrays and indexes is error prone. One can use the index from set X to index into an array in set Y and not know it. it's probably a good idea to make real struct elements so that frame->tf_special.gr[_GR12] is written as frame->tf_special.gr.gr12 In this particular case it would even be better to use SP, as GR12 is the stack pointer. It's a WIP... Affected files ... .. //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/genassym.c#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#2 edit .. //depot/projects/ia64_epc/sys/ia64/ia64/support.s#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/_regset.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/cpu.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/frame.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/pcb.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/reg.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/signal.h#2 edit .. //depot/projects/ia64_epc/sys/ia64/include/ucontext.h#2 edit Differences ... ==== //depot/projects/ia64_epc/sys/ia64/ia64/exception.s#2 (text+ko) ==== @@ -515,24 +515,6 @@ IVT_END(Data_Access_Bit) IVT_ENTRY(Break_Instruction, 0x2c00) - mov r16=pr // save pr for a moment - mov r17=cr.iim;; // read break value - mov r18=0x100000;; // syscall number - cmp.ne p6,p0=r18,r17;; // check for syscall -(p6) br.dpnt.few 9f - - mov r17=cr.ipsr;; // check for user mode - extr.u r17=r17,32,2;; - cmp.eq p6,p0=r0,r17 -(p6) br.dpnt.few 9f // trap if kernel mode - - // Note: p6 and p7 are temporaries so we don't need to restore - // the value of pr here since the user-mode program assumes - // that syscalls only preserve the function-preserved state. - - br.sptk.many do_syscall - ;; -9: mov pr=r16,0x1ffff // restore pr TRAP(11) IVT_END(Break_Instruction) @@ -1500,367 +1482,3 @@ ;; } END(exception_save) - -/* - * System call entry point (via Break Instruction vector). - * - * Arguments: - * r15 System call number - * out0-out7 System call arguments - */ -ENTRY(do_syscall, 0) - .prologue - .unwabi @svr4, 'I' - .save rp,r0 - .body - // Save minimal state for syscall. - // We need to save enough state so that sendsig doesn't - // trash things if we take a signal during the system call. - // Essentially we need to save all the function-preserved - // state. Note that if we don't take a signal, we don't need - // to restore much of that state on the way out. Note also - // that when we save r4-r7 we spill their NaT bits into - // ar.unat. This register is preserved by the call to - // syscall() and if a full restore is needed, - // exception_restore will recover the NaT bits from ar.unat. - // The function-preserved state (including syscall number) is: - // - // r1,r4-r7,sp,r15 - // f16-f31 - // p1-p5,p16-p63 - // b0-b5 - // various ar's - // -{ .mmi // start reading high latency regs - mov r16=cr.ipsr // (13) - mov.m r17=ar.rsc // (13) - mov r18=sp // save user sp - ;; -} { .mmi - mov sp=ar.k6 // (13) kernel sp - mov r19=cr.isr // (13) - nop.i 0 -} { .mmi - mov.m ar.rsc=0 - ;; - mov.m r20=ar.bspstore // (13) - nop.i 0 -} { .mmi - mov.m r21=ar.k5 // (13) - mov.m r22=ar.rnat // (6) - nop.i 0 -} { .mmi - mov.m r23=ar.unat // (6) - rsm psr.dt // (5) physical addressing -} { .mii - mov r24=cr.iip // (2) - mov.i r25=ar.pfs // (2) - add sp=-SIZEOF_TRAPFRAME,sp // reserve trapframe - ;; -} { .mii - addl r27=FRAME_SYSCALL,r0 // (1) - mov r26=pr // (2) - dep r30=0,sp,61,3 // physical address -} { .mmi - srlz.d // serialize psr.dt - ;; - add r31=8,r30 // secondary pointer - ;; -} { .mmi - st8 [r30]=r27,16 // tf_flags - st8 [r31]=r24,16 // save cr.iip - mov r28=b0 - ;; -} { .mmi - st8 [r30]=r16,24 // save cr.ipsr, skip to pr - st8 [r31]=r19,24 // save cr.isr, skip to ar.rsc - mov r24=b1 - ;; -} { .mmi - st8 [r30]=r26,16 // save pr, skip to ar.pfs - st8 [r31]=r17,24 // save ar.rsc, skip to ar.bspstore - mov r27=b2 - ;; -} { .mii - st8 [r30]=r25,24 // save ar.pfs, skip to ar.rnat - mov r16=b3 - mov r17=b4 - ;; -} { .mmi - st8 [r31]=r20,24 // save ar.bspstore, skip to ar.unat - mov.m ar.bspstore=r21 // switch to kernel backing store - mov r29=b5 - ;; -} { .mmi - mov.m r20=ar.ccv - mov.m r21=ar.fpsr - nop.i 0 - ;; -} { .mmi - st8 [r30]=r22,24 // save ar.rnat, skip to ar.ccv - st8 [r31]=r23,16 // save ar.unat, skip to ar.fpsr - nop.i 0 - ;; -} { .mmi - st8 [r30]=r20,32 // save ar.ccv, skip to b0 - st8 [r31]=r21,32 // save ar.fpsr, skip to b1 - nop.i 0 - ;; -} { .mmi - st8 [r30]=r28,16 // save b0, skip to b2 - st8 [r31]=r24,16 // save b1, skip to b3 - nop.i 0 - ;; -} { .mmi - st8 [r30]=r27,16 // save b2, skip to b4 - st8 [r31]=r16,16 // save b3, skip to b5 - nop.i 0 - ;; -} { .mmi - st8 [r30]=r17,TF_R_R1-(TF_B+4*8) // save b4, skip to r1 - st8 [r31]=r29,TF_R_R4-(TF_B+5*8) // save b5, skip to r4 - nop.i 0 - ;; -} { .mmi - st8 [r30]=r1,TF_R_R5-TF_R_R1 // save r1, skip to r5 - .mem.offset 8,0 - st8.spill [r31]=r4,16 // save r4, skip to r6 - nop.i 0 - ;; -} { .mmi - .mem.offset 0,0 - st8.spill [r30]=r5,16 // save r5, skip to r7 - .mem.offset 8,0 - st8.spill [r31]=r6,TF_R_SP-TF_R_R6 // save r6, skip to sp - nop.i 0 - ;; -} { .mmi - .mem.offset 0,0 - st8.spill [r30]=r7,TF_R_R15-TF_R_R7 // save r7, skip to r15 - st8 [r31]=r18 // save sp - nop.i 0 - ;; -} { .mmb - st8 [r30]=r15 // save r15 (syscall number) - add sp=-(8*8),sp // reserve stack for arguments - br.call.sptk.few b0=Lsaveargs // dump args -} { .mmb - mov.m r13=ar.k4 // processor globals - nop.m 0 - bsw.1 // switch back to bank 1 - ;; -} { .mmb - mov r16=sp // point at args - mov.m r17=ar.k5 // for calculating ndirty - cover // preserve user register frame - ;; -} { .mmi - mov r18=cr.ifs // record user's CFM - mov.m r19=ar.bsp // ndirty = ar.bsp - kbsp - add sp=-16,sp // reserve scratch space - ;; -} { .mmi - add r20=TF_CR_IFS+(8*8),r16 // point at cr.ifs - ssm psr.ic|psr.dt // reenable traps and translation - sub r19=r19,r17 // calculate ndirty - ;; -} { .mmi - srlz.i // serialize psr.ic and psr.dt - ;; - ssm psr.i // safe to take interrupts again - add r21=TF_NDIRTY+(8*8),r16 // point at ndirty - ;; -} { .mmi - st8 [r20]=r18 // save cr.ifs - st8 [r21]=r19 // save ndirty - ;; -} { .mmi - alloc r14=ar.pfs,0,1,3,0 - srlz.d // serialize psr.i - add loc0=(8*8),r16 // remember where trapframe is - ;; -} { .mlx - mov out0=r15 // syscall number (from user) - movl gp=__gp // kernel globals -} { .mmb - mov out1=r16 // arguments - add out2=(8*8),r16 // trapframe pointer - br.call.sptk.many rp=syscall // do the work -} { .mmi -3: rsm psr.i // we know that psr.i == 1 - add r14=PC_CURTHREAD,r13 // &curthread - nop.i 0 - ;; -} { .mmi - ld8 r14=[r14] // curthread - ;; - add r14=TD_KSE,r14 // &curthread->td_kse - nop.i 0 - ;; -} { .mmi - ld8 r14=[r14] // curkse - ;; - add r14=KE_FLAGS,r14 // &curkse->ke_flags - nop.i 0 - ;; -} { .mmi - ld4 r14=[r14] // curkse->ke_flags - ;; - nop.m 0 - tbit.nz p6,p7=r14,10 // KEF_ASTPENDING - ;; -} { .mib - nop.m 0 -(p7) tbit.nz.or.andcm p6,p7=r14,11 // KEF_NEEDRESCHED -(p7) br.cond.dptk 2f - ;; -} { .mmi - ssm psr.i // restore interrupts - ;; - srlz.d - mov out0=loc0 // trapframe argument to ast() -} { .mib - nop.m 0 - nop.i 0 - br.call.sptk.many rp=ast -} { .mib - nop.m 0 - nop.i 0 - br 3b -} { .mii -2: ld8 r14=[loc0] // check tf_flags - dep r15=0,loc0,61,3 // physical address of trapframe - ;; - tbit.z p6,p0=r14,0 // check FRAME_SYSCALL bit - ;; -} { .mib -(p6) add sp=-16,loc0 // do a full restore if clear - add r16=SIZEOF_TRAPFRAME,loc0 // new kernel sp -(p6) br.dpnt.many exception_restore -} { .mmi - rsm psr.dt|psr.ic|psr.i // get ready to restore - ;; - srlz.i // serialise psr.dt and psr.ic - add r30=TF_R_R15,r15 // point at r15 - ;; -} { .mmi - alloc r14=ar.pfs,0,0,0,0 // discard register frame - mov ar.k6=r16 // restore kernel sp - add r31=TF_R_SP,r15 // point at sp - ;; -} { .mmi - ld8 r15=[r30],TF_R_R10-TF_R_R15 // restore r15, skip to r10 - ld8 sp=[r31],TF_R_R9-TF_R_SP // restore user sp, skip to r9 - nop.i 0 - ;; -} { .mmi - ld8 r10=[r30],-16 // restore r10, skip to r8 - ld8 r9=[r31],TF_R_R1-TF_R_R9 // restore r9, skip to r1 - nop.i 0 - ;; -} { .mmi - ld8 r8=[r30],TF_B-TF_R_R8 // restore r8, skip to b0 - ld8 r1=[r31],TF_AR_FPSR-TF_R_R1 // restore r1, skip to ar.fpsr - nop.i 0 - ;; -} { .mmi - ld8 r16=[r30],-32 // restore b0, skip to ar.ccv - ld8 r17=[r31],-16 // restore ar.fpsr, skip to ar.unat - nop.i 0 - ;; -} { .mmi - ld8 r18=[r30],-16 // restore ar.ccv, skip to ndirty - ld8 r19=[r31],-16 // restore ar.unat, skip to ar.rnat - mov b0=r16 - ;; -} { .mmi - ld8 r20=[r30],-16 // restore ndirty, skip to ar.bspstore - ld8 r21=[r31],-16 // restore ar.rnat, skip to cr.ifs - nop.i 0 - ;; -} { .mmi - ld8 r16=[r30],-16 // restore ar.bspstore, skip to ar.pfs - mov ar.fpsr=r17 - shl r20=r20,16 // value for ar.rsc - ;; -} { .mmi - ld8 r22=[r31],-16 // restore cr.ifs, skip to ar.rsc - mov.m ar.ccv=r18 - nop.i 0 - ;; -} { .mmi - ld8 r17=[r30],-16 // restore ar.pfs, skip to pr - mov.m ar.unat=r19 - nop.i 0 - ;; -} { .mmi - ld8 r18=[r31],-32 // restore ar.rsc, skip to cr.ipsr - mov.m ar.rsc=r20 // setup for loadrs - nop.i 0 - ;; -} { .mmi - loadrs // restore user stacked registers - ;; - mov.m ar.bspstore=r16 // back to user backing store - mov.i ar.pfs=r17 - ;; -} { .mmi - mov.m ar.rnat=r21 - mov.m ar.rsc=r18 - nop.i 0 - ;; -} { .mmi - ld8 r16=[r30],-32 // restore pr, skip to cr.iip - ld8 r17=[r31] // restore cr.ipsr - nop.i 0 - ;; -} { .mmi - ld8 r18=[r30] // restore cr.iip - mov cr.ifs=r22 - nop.i 0 - ;; -} { .mmi - mov cr.iip=r18 - mov cr.ipsr=r17 - mov pr=r16,0x1ffff - ;; -} { .bbb - rfi -} - - // This is done as a function call to make sure that we only - // have output registers in the register frame. It also gives - // us a chance to use alloc to round up to 8 arguments for - // simplicity. - // - // We are still running in physical mode with psr.ic==0 because - // we haven't yet covered the user's register frame to get a - // value for cr.ifs -Lsaveargs: -{ .mii - alloc r14=ar.pfs,0,0,8,0 // round up to 8 outputs - extr.u r31=sp,0,61 // physical address - ;; - add r30=8,r31 - ;; -} { .mmi - st8 [r31]=r32,16 - st8 [r30]=r33,16 - ;; -} { .mmi - st8 [r31]=r34,16 - st8 [r30]=r35,16 - ;; -} { .mmi - st8 [r31]=r36,16 - st8 [r30]=r37,16 - ;; -} { .mmb - st8 [r31]=r38 - st8 [r30]=r39 - br.ret.sptk.many b0 -} - .global do_syscall_end -do_syscall_end: - -END(do_syscall) ==== //depot/projects/ia64_epc/sys/ia64/ia64/genassym.c#2 (text+ko) ==== @@ -65,88 +65,49 @@ #include <net/if.h> #include <netinet/in.h> -#ifdef IA32 -ASSYM(IA32, IA32); -#endif +ASSYM(DT_NULL, DT_NULL); +ASSYM(DT_RELA, DT_RELA); +ASSYM(DT_RELAENT, DT_RELAENT); +ASSYM(DT_RELASZ, DT_RELASZ); +ASSYM(DT_SYMTAB, DT_SYMTAB); +ASSYM(DT_SYMENT, DT_SYMENT); -ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread)); -ASSYM(PC_IDLETHREAD, offsetof(struct pcpu, pc_idlethread)); -ASSYM(PC_FPCURTHREAD, offsetof(struct pcpu, pc_fpcurthread)); -ASSYM(PC_CURPCB, offsetof(struct pcpu, pc_curpcb)); -ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid)); -ASSYM(PC_CURRENT_PMAP, offsetof(struct pcpu, pc_current_pmap)); +ASSYM(EFAULT, EFAULT); +ASSYM(ENAMETOOLONG, ENAMETOOLONG); -ASSYM(MTX_LOCK, offsetof(struct mtx, mtx_lock)); -ASSYM(MTX_RECURSE, offsetof(struct mtx, mtx_recurse)); -ASSYM(MTX_UNOWNED, MTX_UNOWNED); +ASSYM(FRAME_SYSCALL, FRAME_SYSCALL); -ASSYM(TD_PROC, offsetof(struct thread, td_proc)); -ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); -ASSYM(TD_KSE, offsetof(struct thread, td_kse)); -ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); -ASSYM(TD_MD_FLAGS, offsetof(struct thread, td_md.md_flags)); +#ifdef IA32 +ASSYM(IA32, IA32); +#endif -ASSYM(KE_FLAGS, offsetof(struct kse, ke_flags)); +ASSYM(KE_FLAGS, offsetof(struct kse, ke_flags)); +ASSYM(KEF_ASTPENDING, KEF_ASTPENDING); +ASSYM(KEF_NEEDRESCHED, KEF_NEEDRESCHED); -ASSYM(KEF_ASTPENDING, KEF_ASTPENDING); -ASSYM(KEF_NEEDRESCHED, KEF_NEEDRESCHED); +ASSYM(KSTACK_PAGES, KSTACK_PAGES); -ASSYM(VM_MAXUSER_ADDRESS, VM_MAXUSER_ADDRESS); +ASSYM(PAGE_SHIFT, PAGE_SHIFT); +ASSYM(PAGE_SIZE, PAGE_SIZE); -ASSYM(FRAME_SYSCALL, FRAME_SYSCALL); +ASSYM(PC_CPUID, offsetof(struct pcpu, pc_cpuid)); +ASSYM(PC_CURRENT_PMAP, offsetof(struct pcpu, pc_current_pmap)); +ASSYM(PC_CURTHREAD, offsetof(struct pcpu, pc_curthread)); +ASSYM(PC_IDLETHREAD, offsetof(struct pcpu, pc_idlethread)); -ASSYM(TF_CR_IPSR, offsetof(struct trapframe, tf_cr_ipsr)); -ASSYM(TF_CR_IFS, offsetof(struct trapframe, tf_cr_ifs)); -ASSYM(TF_NDIRTY, offsetof(struct trapframe, tf_ndirty)); -ASSYM(TF_AR_FPSR, offsetof(struct trapframe, tf_ar_fpsr)); -ASSYM(TF_B, offsetof(struct trapframe, tf_b)); -ASSYM(TF_R, offsetof(struct trapframe, tf_r)); -ASSYM(TF_R_R1, offsetof(struct trapframe, tf_r[FRAME_R1])); -ASSYM(TF_R_R2, offsetof(struct trapframe, tf_r[FRAME_R2])); -ASSYM(TF_R_R3, offsetof(struct trapframe, tf_r[FRAME_R3])); -ASSYM(TF_R_R4, offsetof(struct trapframe, tf_r[FRAME_R4])); -ASSYM(TF_R_R5, offsetof(struct trapframe, tf_r[FRAME_R5])); -ASSYM(TF_R_R6, offsetof(struct trapframe, tf_r[FRAME_R6])); -ASSYM(TF_R_R7, offsetof(struct trapframe, tf_r[FRAME_R7])); -ASSYM(TF_R_R8, offsetof(struct trapframe, tf_r[FRAME_R8])); -ASSYM(TF_R_R9, offsetof(struct trapframe, tf_r[FRAME_R9])); -ASSYM(TF_R_R10, offsetof(struct trapframe, tf_r[FRAME_R10])); -ASSYM(TF_R_R11, offsetof(struct trapframe, tf_r[FRAME_R11])); -ASSYM(TF_R_SP, offsetof(struct trapframe, tf_r[FRAME_SP])); -ASSYM(TF_R_R13, offsetof(struct trapframe, tf_r[FRAME_R13])); -ASSYM(TF_R_R14, offsetof(struct trapframe, tf_r[FRAME_R14])); -ASSYM(TF_R_R15, offsetof(struct trapframe, tf_r[FRAME_R15])); -ASSYM(TF_F, offsetof(struct trapframe, tf_f)); - ASSYM(PCB_CURRENT_PMAP, offsetof(struct pcb, pcb_current_pmap)); ASSYM(PCB_ONFAULT, offsetof(struct pcb, pcb_onfault)); -ASSYM(PCB_RP, offsetof(struct pcb, pcb_rp)); -ASSYM(PCB_UNAT47, offsetof(struct pcb, pcb_unat47)); -ASSYM(UC_MCONTEXT_MC_AR_BSP, offsetof(ucontext_t, uc_mcontext.mc_ar_bsp)); -ASSYM(UC_MCONTEXT_MC_AR_RNAT, offsetof(ucontext_t, uc_mcontext.mc_ar_rnat)); +ASSYM(R_IA64_DIR64LSB, R_IA64_DIR64LSB); +ASSYM(R_IA64_FPTR64LSB, R_IA64_FPTR64LSB); +ASSYM(R_IA64_NONE, R_IA64_NONE); +ASSYM(R_IA64_REL64LSB, R_IA64_REL64LSB); -ASSYM(EFAULT, EFAULT); -ASSYM(ENAMETOOLONG, ENAMETOOLONG); - -ASSYM(PAGE_SHIFT, PAGE_SHIFT); -ASSYM(PAGE_SIZE, PAGE_SIZE); -ASSYM(KSTACK_PAGES, KSTACK_PAGES); - +ASSYM(SIZEOF_PCB, sizeof(struct pcb)); ASSYM(SIZEOF_TRAPFRAME, sizeof(struct trapframe)); -ASSYM(SIZEOF_PCB, sizeof(struct pcb)); -ASSYM(DT_NULL, DT_NULL); -ASSYM(DT_RELA, DT_RELA); -ASSYM(DT_RELASZ, DT_RELASZ); -ASSYM(DT_SYMTAB, DT_SYMTAB); -ASSYM(DT_SYMENT, DT_SYMENT); -ASSYM(DT_RELAENT, DT_RELAENT); -ASSYM(R_IA64_NONE, R_IA64_NONE); -ASSYM(R_IA64_DIR64LSB, R_IA64_DIR64LSB); -ASSYM(R_IA64_FPTR64LSB, R_IA64_FPTR64LSB); -ASSYM(R_IA64_REL64LSB, R_IA64_REL64LSB); +ASSYM(TD_KSE, offsetof(struct thread, td_kse)); +ASSYM(TD_KSTACK, offsetof(struct thread, td_kstack)); +ASSYM(TD_PCB, offsetof(struct thread, td_pcb)); -ASSYM(PAL_PTCE_INFO, PAL_PTCE_INFO); -ASSYM(PAL_FREQ_RATIOS, PAL_FREQ_RATIOS); -ASSYM(PAL_VM_SUMMARY, PAL_VM_SUMMARY); +ASSYM(VM_MAX_ADDRESS, VM_MAX_ADDRESS); ==== //depot/projects/ia64_epc/sys/ia64/ia64/machdep.c#2 (text+ko) ==== @@ -706,8 +706,9 @@ * XXX what is all this +/- 16 stuff? */ thread0.td_frame = (struct trapframe *)thread0.td_pcb - 1; - thread0.td_pcb->pcb_sp = (u_int64_t)thread0.td_frame - 16; - thread0.td_pcb->pcb_ar_bsp = (u_int64_t)proc0kstack; + thread0.td_pcb->pcb_special.gr[_GR12] = + (u_int64_t)thread0.td_frame - 16; + thread0.td_pcb->pcb_special.ar_bspstore = (u_int64_t)proc0kstack; mutex_init(); @@ -792,7 +793,8 @@ struct trapframe *frame; struct sigacts *psp; struct sigframe sf, *sfp; - u_int64_t sbs = 0; + mcontext_t *mc; + u_int64_t sbs = 0, sp; int oonstack, rndfsize; td = curthread; @@ -800,48 +802,35 @@ PROC_LOCK_ASSERT(p, MA_OWNED); psp = p->p_sigacts; frame = td->td_frame; - oonstack = sigonstack(frame->tf_r[FRAME_SP]); + sp = frame->tf_special.gr[_GR12]; + oonstack = sigonstack(sp); rndfsize = ((sizeof(sf) + 15) / 16) * 16; - /* - * Make sure that we restore the entire trapframe after a - * signal. - */ - frame->tf_flags &= ~FRAME_SYSCALL; - /* save user context */ bzero(&sf, sizeof(struct sigframe)); sf.sf_uc.uc_sigmask = *mask; sf.sf_uc.uc_stack = p->p_sigstk; sf.sf_uc.uc_stack.ss_flags = (p->p_flag & P_ALTSTACK) ? ((oonstack) ? SS_ONSTACK : 0) : SS_DISABLE; - sf.sf_uc.uc_mcontext.mc_flags = IA64_MC_FLAG_ONSTACK; - sf.sf_uc.uc_mcontext.mc_onstack = (oonstack) ? 1 : 0; - sf.sf_uc.uc_mcontext.mc_nat = 0; /* XXX */ - sf.sf_uc.uc_mcontext.mc_sp = frame->tf_r[FRAME_SP]; - sf.sf_uc.uc_mcontext.mc_ip = (frame->tf_cr_iip - | ((frame->tf_cr_ipsr >> 41) & 3)); - sf.sf_uc.uc_mcontext.mc_cfm = frame->tf_cr_ifs & ~(1<<31); - sf.sf_uc.uc_mcontext.mc_um = frame->tf_cr_ipsr & 0x1fff; - sf.sf_uc.uc_mcontext.mc_ar_rsc = frame->tf_ar_rsc; - sf.sf_uc.uc_mcontext.mc_ar_bsp = frame->tf_ar_bspstore; - sf.sf_uc.uc_mcontext.mc_ar_rnat = frame->tf_ar_rnat; - sf.sf_uc.uc_mcontext.mc_ar_ccv = frame->tf_ar_ccv; - sf.sf_uc.uc_mcontext.mc_ar_unat = frame->tf_ar_unat; - sf.sf_uc.uc_mcontext.mc_ar_fpsr = frame->tf_ar_fpsr; - sf.sf_uc.uc_mcontext.mc_ar_pfs = frame->tf_ar_pfs; - sf.sf_uc.uc_mcontext.mc_pr = frame->tf_pr; - - bcopy(&frame->tf_b[0], - &sf.sf_uc.uc_mcontext.mc_br[0], - 8 * sizeof(unsigned long)); - sf.sf_uc.uc_mcontext.mc_gr[0] = 0; - bcopy(&frame->tf_r[0], - &sf.sf_uc.uc_mcontext.mc_gr[1], - 31 * sizeof(unsigned long)); - - /* XXX mc_fr[] */ + mc = &sf.sf_uc.uc_mcontext; + mc->mc_special = frame->tf_special; + if ((frame->tf_flags & FRAME_SYSCALL) == 0) { + mc->mc_flags |= IA64_MC_FLAGS_SCRATCH_VALID; + mc->mc_scratch = frame->tf_scratch; + mc->mc_scratch_fp = frame->tf_scratch_fp; + } + /* + * XXX preserved registers. We don't have the preserved registers + * in the trapframe. We don't worry about it now. + */ + /* + * XXX High FP. If the process has never used the high FP, mark + * the high FP as valid (zero defaults). If the process did use + * the high FP, then store them in the PCB if not already there + * (ie get them from the CPU that has them) and write them in + * the context. + */ /* * Allocate and validate space for the signal handler @@ -855,42 +844,28 @@ sbs = (u_int64_t) p->p_sigstk.ss_sp; sfp = (struct sigframe *)((caddr_t)p->p_sigstk.ss_sp + p->p_sigstk.ss_size - rndfsize); - /* - * Align sp and bsp. - */ + /* Align sp and bsp. */ sbs = (sbs + 15) & ~15; sfp = (struct sigframe *)((u_int64_t)sfp & ~15); #if defined(COMPAT_43) || defined(COMPAT_SUNOS) p->p_sigstk.ss_flags |= SS_ONSTACK; #endif } else - sfp = (struct sigframe *)(frame->tf_r[FRAME_SP] - rndfsize); + sfp = (struct sigframe *)(sp - rndfsize); PROC_UNLOCK(p); #ifdef DEBUG if ((sigdebug & SDB_KSTACK) && p->p_pid == sigpid) printf("sendsig(%d): sig %d ssp %p usp %p\n", p->p_pid, - sig, &sf, sfp); + sig, &sf, sfp); #endif -#if 0 - /* save the floating-point state, if necessary, then copy it. */ - ia64_fpstate_save(td, 1); - sf.sf_uc.uc_mcontext.mc_ownedfp = td->td_md.md_flags & MDP_FPUSED; - bcopy(&td->td_pcb->pcb_fp, - (struct fpreg *)sf.sf_uc.uc_mcontext.mc_fpregs, - sizeof(struct fpreg)); - sf.sf_uc.uc_mcontext.mc_fp_control = td->td_pcb.pcb_fp_control; -#endif - - /* - * copy the frame out to userland. - */ + /* Copy the frame out to userland. */ if (copyout((caddr_t)&sf, (caddr_t)sfp, sizeof(sf)) != 0) { #ifdef DEBUG if ((sigdebug & SDB_KSTACK) && p->p_pid == sigpid) printf("sendsig(%d): copyout failed on sig %d\n", - p->p_pid, sig); + p->p_pid, sig); #endif /* * Process has trashed its stack; give it an illegal @@ -910,35 +885,31 @@ sfp, code); #endif - /* - * Set up the registers to return to sigcode. - */ - frame->tf_cr_ipsr &= ~IA64_PSR_RI; - frame->tf_cr_iip = PS_STRINGS - (esigcode - sigcode); - frame->tf_r[FRAME_R1] = sig; + /* Set up the registers to return to sigcode. */ + frame->tf_special.psr &= ~IA64_PSR_RI; + frame->tf_special.ip = PS_STRINGS - (esigcode - sigcode); + frame->tf_special.gr[_GR1] = sig; PROC_LOCK(p); if (SIGISMEMBER(p->p_sigacts->ps_siginfo, sig)) { - frame->tf_r[FRAME_R15] = (u_int64_t)&(sfp->sf_si); + frame->tf_scratch.gr[_GR15] = (u_int64_t)&(sfp->sf_si); /* Fill in POSIX parts */ sf.sf_si.si_signo = sig; sf.sf_si.si_code = code; - sf.sf_si.si_addr = (void*)frame->tf_cr_ifa; - } - else - frame->tf_r[FRAME_R15] = code; + sf.sf_si.si_addr = (void*)frame->tf_special.ifa; + } else + frame->tf_scratch.gr[_GR15] = code; - frame->tf_r[FRAME_SP] = (u_int64_t)sfp - 16; - frame->tf_r[FRAME_R14] = sig; - frame->tf_r[FRAME_R15] = (u_int64_t) &sfp->sf_si; - frame->tf_r[FRAME_R16] = (u_int64_t) &sfp->sf_uc; - frame->tf_r[FRAME_R17] = (u_int64_t)catcher; - frame->tf_r[FRAME_R18] = sbs; + frame->tf_special.gr[_GR12] = (u_int64_t)sfp - 16; + frame->tf_scratch.gr[_GR14] = sig; + frame->tf_scratch.gr[_GR16] = (u_int64_t) &sfp->sf_uc; + frame->tf_scratch.gr[_GR17] = (u_int64_t)catcher; + frame->tf_scratch.gr[_GR18] = sbs; #ifdef DEBUG if (sigdebug & SDB_FOLLOW) printf("sendsig(%d): pc %lx, catcher %lx\n", p->p_pid, - frame->tf_cr_iip, frame->tf_regs[FRAME_R4]); + frame->tf_cr_iip, frame->tf_scratch.gr[_GR17]); if ((sigdebug & SDB_KSTACK) && p->p_pid == sigpid) printf("sendsig(%d): sig %d returns\n", p->p_pid, sig); @@ -963,70 +934,44 @@ } */ *uap) { ucontext_t uc; - const ucontext_t *ucp; + struct trapframe *frame; + struct __mcontext *mc; + struct proc *p; struct pcb *pcb; - struct trapframe *frame = td->td_frame; - struct __mcontext *mcp; - struct proc *p; - ucp = uap->sigcntxp; + frame = td->td_frame; + p = td->td_proc; pcb = td->td_pcb; - p = td->td_proc; #ifdef DEBUG if (sigdebug & SDB_FOLLOW) - printf("sigreturn: pid %d, scp %p\n", p->p_pid, ucp); + printf("sigreturn: pid %d, scp %p\n", p->p_pid, uap->sigcntxp); #endif /* * Fetch the entire context structure at once for speed. * We don't use a normal argument to simplify RSE handling. */ - if (copyin((caddr_t)frame->tf_r[FRAME_R4], - (caddr_t)&uc, sizeof(ucontext_t))) + if (copyin(uap->sigcntxp, (caddr_t)&uc, sizeof(uc))) return (EFAULT); - if (frame->tf_ndirty != 0) { - printf("sigreturn: dirty user stacked registers\n"); - } - /* * Restore the user-supplied information */ - mcp = &uc.uc_mcontext; - bcopy(&mcp->mc_br[0], &frame->tf_b[0], 8*sizeof(u_int64_t)); - bcopy(&mcp->mc_gr[1], &frame->tf_r[0], 31*sizeof(u_int64_t)); - /* XXX mc_fr */ - - frame->tf_flags &= ~FRAME_SYSCALL; - frame->tf_cr_iip = mcp->mc_ip & ~15; - frame->tf_cr_ipsr &= ~IA64_PSR_RI; - switch (mcp->mc_ip & 15) { - case 1: - frame->tf_cr_ipsr |= IA64_PSR_RI_1; - break; - case 2: - frame->tf_cr_ipsr |= IA64_PSR_RI_2; - break; + mc = &uc.uc_mcontext; + frame->tf_special = mc->mc_special; + if ((mc->mc_flags & IA64_MC_FLAGS_SCRATCH_VALID) != 0) { + frame->tf_scratch = mc->mc_scratch; + frame->tf_scratch_fp = mc->mc_scratch_fp; } - frame->tf_cr_ipsr = ((frame->tf_cr_ipsr & ~0x1fff) - | (mcp->mc_um & 0x1fff)); - frame->tf_pr = mcp->mc_pr; - frame->tf_ar_rsc = (mcp->mc_ar_rsc & 3) | 12; /* user, loadrs=0 */ - frame->tf_ar_pfs = mcp->mc_ar_pfs; - frame->tf_cr_ifs = mcp->mc_cfm | (1UL<<63); - frame->tf_ar_bspstore = mcp->mc_ar_bsp; - frame->tf_ar_rnat = mcp->mc_ar_rnat; - frame->tf_ndirty = 0; /* assumes flushrs in sigcode */ - frame->tf_ar_unat = mcp->mc_ar_unat; - frame->tf_ar_ccv = mcp->mc_ar_ccv; - frame->tf_ar_fpsr = mcp->mc_ar_fpsr; - - frame->tf_r[FRAME_SP] = mcp->mc_sp; + /* + * XXX preserved registers. + * XXX High FP. + */ PROC_LOCK(p); #if defined(COMPAT_43) || defined(COMPAT_SUNOS) - if (uc.uc_mcontext.mc_onstack & 1) + if (sigonstack(frame->tf_special.gr[_GR12])) p->p_sigstk.ss_flags |= SS_ONSTACK; else p->p_sigstk.ss_flags &= ~SS_ONSTACK; @@ -1039,11 +984,6 @@ /* XXX ksc.sc_ownedfp ? */ ia64_fpstate_drop(td); -#if 0 - bcopy((struct fpreg *)uc.uc_mcontext.mc_fpregs, - &td->td_pcb->pcb_fp, sizeof(struct fpreg)); - td->td_pcb->pcb_fp_control = uc.uc_mcontext.mc_fp_control; -#endif #ifdef DEBUG if (sigdebug & SDB_FOLLOW) @@ -1104,29 +1044,14 @@ struct trapframe *frame; frame = td->td_frame; + bzero(frame, sizeof(*frame)); - /* - * Make sure that we restore the entire trapframe after an - * execve. - */ - frame->tf_flags &= ~FRAME_SYSCALL; + frame->tf_special.ip = entry; + frame->tf_special.psr = IA64_PSR_IC | IA64_PSR_I | IA64_PSR_IT | + IA64_PSR_DT | IA64_PSR_RT | IA64_PSR_DFH | IA64_PSR_BN | + IA64_PSR_CPL_USER; - bzero(frame->tf_r, sizeof(frame->tf_r)); - bzero(frame->tf_f, sizeof(frame->tf_f)); - frame->tf_cr_iip = entry; - frame->tf_cr_ipsr = (IA64_PSR_IC - | IA64_PSR_I - | IA64_PSR_IT - | IA64_PSR_DT - | IA64_PSR_RT - | IA64_PSR_DFH - | IA64_PSR_BN - | IA64_PSR_CPL_USER); - /* - * Make sure that sp is aligned to a 16 byte boundary and - * reserve 16 bytes of scratch space for _start. - */ - frame->tf_r[FRAME_SP] = (stack & ~15) - 16; + frame->tf_special.gr[_GR12] = (stack & ~15) - 16; /* * Write values for out0, out1 and out2 to the user's backing @@ -1134,15 +1059,13 @@ * initial register frame. Assumes that (bspstore & 0x1f8) < * 0x1e0. */ - frame->tf_ar_bspstore = td->td_md.md_bspstore + 24; - suword((caddr_t) frame->tf_ar_bspstore - 24, stack); - suword((caddr_t) frame->tf_ar_bspstore - 16, ps_strings); - suword((caddr_t) frame->tf_ar_bspstore - 8, 0); - frame->tf_ndirty = 0; - frame->tf_cr_ifs = (1L<<63) | 3; /* sof=3, v=1 */ + frame->tf_special.ar_bspstore = td->td_md.md_bspstore + 24; + suword((caddr_t)frame->tf_special.ar_bspstore - 24, stack); + suword((caddr_t)frame->tf_special.ar_bspstore - 16, ps_strings); + suword((caddr_t)frame->tf_special.ar_bspstore - 8, 0); - frame->tf_ar_rsc = 0xf; /* user mode rsc */ - frame->tf_ar_fpsr = IA64_FPSR_DEFAULT; + frame->tf_special.ar_rsc = 0xf; + frame->tf_special.ar_fpsr = IA64_FPSR_DEFAULT; td->td_md.md_flags &= ~MDP_FPUSED; ia64_fpstate_drop(td); @@ -1168,16 +1091,17 @@ return (EINVAL); } - td->td_frame->tf_cr_iip = addr & ~0x0FULL; - td->td_frame->tf_cr_ipsr = (td->td_frame->tf_cr_ipsr & ~IA64_PSR_RI) | - slot; + td->td_frame->tf_special.ip = addr & ~0x0FULL; + td->td_frame->tf_special.psr = + (td->td_frame->tf_special.psr & ~IA64_PSR_RI) | slot; return (0); } int ptrace_single_step(struct thread *td) { - td->td_frame->tf_cr_ipsr |= IA64_PSR_SS; + + td->td_frame->tf_special.psr |= IA64_PSR_SS; return (0); } @@ -1188,66 +1112,26 @@ } int -fill_regs(td, regs) - struct thread *td; - struct reg *regs; +fill_regs(struct thread *td, struct reg *regs) { - bcopy(td->td_frame->tf_b, regs->r_br, sizeof(regs->r_br)); - bcopy(td->td_frame->tf_r, regs->r_gr+1, sizeof(td->td_frame->tf_r)); - /* TODO copy registers from the register stack. */ + struct trapframe *tf; - regs->r_cfm = td->td_frame->tf_cr_ifs; - regs->r_ip = td->td_frame->tf_cr_iip; - regs->r_ip |= (td->td_frame->tf_cr_ipsr & IA64_PSR_RI) >> 41; - regs->r_pr = td->td_frame->tf_pr; - regs->r_psr = td->td_frame->tf_cr_ipsr; - regs->r_ar_rsc = td->td_frame->tf_ar_rsc; - regs->r_ar_bsp = 0; /* XXX */ - regs->r_ar_bspstore = td->td_frame->tf_ar_bspstore; - regs->r_ar_rnat = td->td_frame->tf_ar_rnat; - regs->r_ar_ccv = td->td_frame->tf_ar_ccv; - regs->r_ar_unat = td->td_frame->tf_ar_unat; - regs->r_ar_fpsr = td->td_frame->tf_ar_fpsr; - regs->r_ar_pfs = td->td_frame->tf_ar_pfs; - regs->r_ar_lc = td->td_frame->tf_ar_lc; - regs->r_ar_ec = td->td_frame->tf_ar_ec; - + tf = td->td_frame; + regs->r_special = tf->tf_special; + regs->r_scratch = tf->tf_scratch; + /* XXX preserved */ return (0); } int -set_regs(td, regs) - struct thread *td; - struct reg *regs; +set_regs(struct thread *td, struct reg *regs) { - int error; + struct trapframe *tf; - error = ptrace_set_pc(td, regs->r_ip); - if (error) - return (error); - - td->td_frame->tf_cr_ipsr &= ~0x1FUL; /* clear user mask */ - td->td_frame->tf_cr_ipsr |= regs->r_psr & 0x1FUL; - - td->td_frame->tf_pr = regs->r_pr; - - /* XXX r_ar_bsp */ - - td->td_frame->tf_ar_rsc = regs->r_ar_rsc; - td->td_frame->tf_ar_pfs = regs->r_ar_pfs; - td->td_frame->tf_cr_ifs = regs->r_cfm; - td->td_frame->tf_ar_bspstore = regs->r_ar_bspstore; - td->td_frame->tf_ar_rnat = regs->r_ar_rnat; - td->td_frame->tf_ar_unat = regs->r_ar_unat; - td->td_frame->tf_ar_ccv = regs->r_ar_ccv; - td->td_frame->tf_ar_fpsr = regs->r_ar_fpsr; - td->td_frame->tf_ar_lc = regs->r_ar_lc; - td->td_frame->tf_ar_ec = regs->r_ar_ec; - - bcopy(regs->r_br, td->td_frame->tf_b, sizeof(td->td_frame->tf_b)); >>> TRUNCATED FOR MAIL (1000 lines) <<< To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe p4-projects" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?200302142338.h1ENc4k0008977>