Date: Mon, 26 May 2003 11:06:34 -0700 From: Tim Wiess <tim@zetaflops.net> To: Juli Mallett <jmallett@freebsd.org> Cc: freebsd-mips@freebsd.org Subject: Re: Current status of FreeBSD/MIPS Message-ID: <200305261806.h4QI6YaP020009@akira.zetaflops.net> In-Reply-To: Message from Juli Mallett <jmallett@freebsd.org> of "Fri, 23 May 2003 21:53:45 CDT." <20030523215344.A77797@FreeBSD.org>
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Juli,
I just posted a bunch of my mips errata for you to snag.
http://www.zetaflops.net/~tim/errata
R4000_3.0_2.2_MC_errata.ps.Z has a couple entries related to the
ll/sc bugs. However it seems that issue was resolved in the R4400s
since there is no mention of it in any of those docs.
BTW, last time I checked, ftp.sgi.com still has all the old mips
manuals and errata available.
tim
> After many hours sitting and looking blankly at heisenbugs,
> printfs that would make data accesses work, etc., I finally
> sat down the other day and started looking for CPU errata.
> I found some mention of LL/SC errata that might affect my
> processor, and decided to replace atomic.h with a C version,
> and suddenly I'm getting to cpu0: messages, and beyond by
> some ways. I've got about two large pages of SI_SUB listing
> to make things go through, which at this point means fixing
> up NetBSD's exception, etc., code to work, and getting stuff
> like interrupts working, and doing a RealPmap(tm) instead
> of just doing everything lazily out of KSEG0. Here's what
> goes on, modulo debugging printfs and the like:
>
> %%%
> Copyright (c) 1992-2003 The FreeBSD Project.
> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
> The Regents of the University of California. All rights reserved.
> FreeBSD 5.0-CURRENT #376: Fri May 23 00:17:16 CDT 2003
> jmallett@dalek:/usr/people/jmallett/mips.build/sgimips/usr/people/jmallet
t/p4/mips/sys/INDY
> MIPS R4400 CPU (0x460) Rev. 6.0 with MIPS R4010 FPC Rev. 0.0
> cpu0: 16KB/16B direct-mapped L1 Instruction cache, 48 TLB entries
> cpu0: 16KB/16B direct-mapped write-back L1 Data cache
> cpu0: 0KB/128B direct-mapped write-back L2 Unified cache
> machine: SGI-IP22
> ARCS memory = 786432 (768 KB)
> Loaded program memory = 1449984 (1416 KB)
> avail memory = 131964928 (125 MB)
> real memory = 134201344 (127 MB)
> %%%
>
> I'd like a bit of help with one thing, if anyone could help...
>
> MIPS redid their website, and in the process seems to have lost
> all their R4K docs. This includes all the CPU errata from that
> era, and I've looked at some Google-Cached HTML of these things,
> but that's very hard to read, and I've had mixed results with
> doing that. If someone has the errata PDFs and could send them
> to me, that would be really great. And also, if someone knows
> much about the LL/SC errata, I can send off a copy of the atomic.h
> that I'd *like* to be doing, and you can maybe tell me what
> changes need made :)
>
> Thanx much,
> juli.
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