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Date: Mon, 8 Apr 2013 15:33:34 +0300
From: Aleksandr Rybalko <ray@freebsd.org>
To: Adrian Chadd <adrian@freebsd.org>
Subject: Re: [PATCH] MMC/SD SPI-mode driver
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On Sat, 6 Apr 2013 19:57:05 -0700
Adrian Chadd <adrian@freebsd.org> wrote:

> On 6 April 2013 16:24, Aleksandr Rybalko <ray@freebsd.org> wrote:
> 
> >> The other question is how we implement it. You've implemented a "get
> >> block" device method. That's a very atheros chipset specific hack just
> >> to get accelerated flash IO. Is there perhaps a better way to approach
> >> this?
> >
> > As I see, no way to put data back to flash.
> 
> Well, look at the Linux code. If there's a read that can be satisfied
> by a copy, it:
> 
> * puts the flash device back into mapped mode;
> * does the transfer;
> * puts the flash device back into SPI mode.
> 
> That way both can occur independently.

Agree, but you forget to say about lock/unlock :)

> 
> >> What about the 8 versus 32 bit shifting that I see in the driver? Are
> >> we able to actually shift 32 bits at a time?
> >
> > Currently we do 1 bit shifting :))) Pure, 1-bit control.
> > Maybe you (as Atheros guy) know how to shift more :)))
> 
> Writes are clocked out like that, sure. But if I read the linux code
> right, they do up to 32 bits of shifting at once, then do a 32 bit
> read.

I don't think we will get much progress here. if we will do it with
32bit width, we will do same GPIO stuff, but plus care about alignment.

> 
> Rather than us shifting a byte in/out at a time over SPI.

90%/10% - find easiest way :-P
:)

> 
> 
> 
> Adrian


-- 
Aleksandr Rybalko <ray@freebsd.org>