From owner-freebsd-embedded@FreeBSD.ORG Sun Feb 28 11:42:21 2010 Return-Path: Delivered-To: embedded@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 2892B1065672; Sun, 28 Feb 2010 11:42:21 +0000 (UTC) (envelope-from jkoshy.freebsd@gmail.com) Received: from mail-pw0-f54.google.com (mail-pw0-f54.google.com [209.85.160.54]) by mx1.freebsd.org (Postfix) with ESMTP id D52C98FC08; Sun, 28 Feb 2010 11:42:20 +0000 (UTC) Received: by pwj7 with SMTP id 7so1219594pwj.13 for ; Sun, 28 Feb 2010 03:42:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:sender:message-id:to:cc :subject:in-reply-to:references:user-agent:mime-version:content-type :from:date; bh=T7dKUhd4Km5CFqvvf4o7sOeZg5nYGNYOLkXvNtzeCoE=; b=i/OeLrNYikCBYh6i5wGOLl0ORhi7GI9rMaggWEmMkLyZ91z1Rk0ep0PtHqoJmUeKVU My/jrliaMTxR28llUIdugXqa27JJNKBTvkv19wFYWmH3qTWBwjvMF8kHh3MZgzkMIGF6 mTAl5Pb1Zvm4A4ttkXpvaxSLllyG1avKm6q28= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:message-id:to:cc:subject:in-reply-to:references:user-agent :mime-version:content-type:from:date; b=O8Ii/Dc/X6YG0Iyz32GGntYhHbTqckndYjf5Y8t1cvNj50pk0xLffEYvfK/K48ujo7 Vs7O5XrcqVDadJ7qHQqBd7HHSODzfJsxK1lErbray9G+efCPpGyt3E19BFg1gNpBvb3g exvNj52r7cj5U3Y+g0BH4WC8ULe0Eu/OUydoc= Received: by 10.143.129.2 with SMTP id g2mr1388971wfn.273.1267357335402; Sun, 28 Feb 2010 03:42:15 -0800 (PST) Received: from moria.unixconsulting.co.in ([117.204.49.159]) by mx.google.com with ESMTPS id 23sm2427212pzk.2.2010.02.28.03.42.10 (version=TLSv1/SSLv3 cipher=RC4-MD5); Sun, 28 Feb 2010 03:42:13 -0800 (PST) Sender: Joseph Koshy Message-ID: <861vg54mr7.wl%koshy@unixconsulting.co.in> To: George Neville-Neil In-Reply-To: <3BF42672-9790-4D7F-9723-3D80601930B7@neville-neil.com> References: <42B59FCC-7A59-4383-BE4E-366B80B504BF@neville-neil.com> <867hqa9d0h.wl%koshy@unixconsulting.co.in> <3BF42672-9790-4D7F-9723-3D80601930B7@neville-neil.com> User-Agent: Wanderlust/2.14.0 (Africa) SEMI/1.14.6 (Maruoka) FLIM/1.14.8 (=?ISO-8859-4?Q?Shij=F2?=) APEL/10.7 Emacs/22.3 (amd64-portbld-freebsd6.3) MULE/5.0 (SAKAKI) MIME-Version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-Type: text/plain; charset=US-ASCII From: Joseph Koshy Date: Sun, 28 Feb 2010 11:36:23 -0000 Cc: Joseph Koshy , embedded@freebsd.org, fabient@freebsd.org Subject: Re: First cut at hwpmc support on MIPS X-BeenThere: freebsd-embedded@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Dedicated and Embedded Systems List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Feb 2010 11:42:21 -0000 > > 7) From the definitions in the header file, these PMCs appear to > > support the concept of sampling based on processor mode: > > > > +#define MIPS_PMC_USER_ENABLE 0x08 /* Count in USER mode */ > > +#define MIPS_PMC_SUPER_ENABLE 0x04 /* Count in SUPERVISOR mode */ > > +#define MIPS_PMC_KERNEL_ENABLE 0x02 /* Count in KERNEL mode */ > > > > If that is the case, then you should support those modifiers in > > libpmc's event parsing. The libpmc code in the patch appears to be > > a stub: > > > > +static int > > +mips_allocate_pmc(enum pmc_event pe, char *ctrspec __unused, > > + struct pmc_op_pmcallocate *pmc_config __unused) > > +{ > > + switch (pe) { > > + default: > > + break; > > + } > > + > > + return (0); > > +} > > > > > Is there any other processor that does this? Right now I make the chip > sample in all modes by fiat. All the Intel and AMD PMCs: see the handling of the "usr" and "os" qualifiers. > > 8) You can reduce the size of the following table in "hwpmc_mips.c", > > by treating the pe_counter field as a set of flags. > > > > +struct mips_event_code_map { > > + enum pmc_event pe_ev; /* enum value */ > > + uint8_t pe_counter; /* Which counter this can be counted in. */ > > + uint8_t pe_code; /* numeric code */ > > +}; > > > > +const struct mips_event_code_map mips_event_codes[] = { > > + { PMC_EV_MIPS_CYCLE, 0, 0}, > > + { PMC_EV_MIPS_CYCLE, 1, 0}, <<<--- repeated information Most Intel CPUs have restrictions on the events that PMCs support. You may want to look at the P6, or Intel Core support code for examples. > > 9) You'd want to support flags that control counting based on > > processor modes. For this, you would want to pass down flags > > from userland and change the `pm_mips_evsel' field to suit: > > > > +static int > > +mips_allocate_pmc(int cpu, int ri, struct pmc *pm, > > + const struct pmc_op_pmcallocate *a) > > +{ > > ... > > + pm->pm_md.pm_mips.pm_mips_evsel = config; > > > Again, for both of these, is there an example I should work from? See P6, Pentium IV, AMD, Intel Core for examples. Additional comments on patch #3: * The manual page still has UTF 8. E.g.,- +Count all pipeline bubbles that are a result of multicycle ISPRAM +access. Pipeline bubbles are defined as all cycles that IFU doesn<80><99>t +present an instruction to ALU. The four cycles after a redirect are * The convention is that sentences always start on a new line in -mdoc input. Regards, Koshy