Date: Thu, 30 Jan 1997 21:00:48 +0300 (MSK) From: bag@sinbin.demos.su (Alex G. Bulushev) To: smp@csn.net (Steve Passe) Cc: freebsd-smp@freebsd.org Subject: Re: troubles with smp kernel Message-ID: <199701301800.VAA18189@sinbin.demos.su> In-Reply-To: <199701301739.KAA17552@clem.systemsix.com> from "Steve Passe" at Jan 30, 97 10:39:57 am
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Hi, > > Asus about IOAPIC: > > > > Current Pentium Pro CPU Cards only support PIIX3 SMI so leave JP5 on default > > settings (don't swith to APIC SMI) until future update ... > what is J5 described to do? we have several people using this board with > APIC_IO enabled, so I know its possible. Asus write: SMI Settings (JP5) SMI is asserted by either PIIX3 chip (only one CPU can accept SMI) or IOAPIC chip (two CPU's can accept SMI). Current Pentium Pro CPU Card only support PIIX3 SMI so leave on default seyings until future update SMI JP5 PIIX3 SMI [1-2] (default) APIC SMI [2-3] > > Processors: APIC ID Version State Family Model Step Flags > > 1 0x11 BSP, usable 6 1 6 0xfbff > > 0 0x11 AP, usable 6 1 7 0xfbff > > > > I/O APICs: APIC ID Version State Address > > 2 0x11 usable 0xfec00000 > > > > -- > > is this area really missing or did you truncate the output? there should be > a long list of INTerrupt associations here!!! this is a real output with JP5 default setings (PIIX3 SMI) now mptable output for JP5 in APIC SMI position: =============================================================================== MPTable, version 2.0.4 ------------------------------------------------------------------------------- MP Floating Pointer Structure: location: BIOS physical address: 0x000f60b0 signature: '_MP_' length: 16 bytes version: 1.4 checksum: 0x8b mode: Virtual Wire ------------------------------------------------------------------------------- MP Config Table Header: physical address: 0x000f5caa signature: 'PCMP' base table length: 268 version: 1.4 checksum: 0xf9 OEM ID: 'OEM00000' Product ID: 'PROD00000000' OEM table pointer: 0x00000000 OEM table size: 0 entry count: 25 local APIC address: 0xfee00000 extended table length: 0 extended table checksum: 0 ------------------------------------------------------------------------------- MP Config Base Table Entries: -- Processors: APIC ID Version State Family Model Step Flags 1 0x11 BSP, usable 6 1 6 0xfbff 0 0x11 AP, usable 6 1 7 0xfbff -- Bus: Bus ID Type 0 PCI 1 PCI 2 PCI 3 ISA -- I/O APICs: APIC ID Version State Address 2 0x11 usable 0xfec00000 -- I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID INT# ExtINT conforms conforms 3 0 2 0 INT conforms conforms 3 1 2 1 INT conforms conforms 3 0 2 2 INT conforms conforms 3 3 2 3 INT conforms conforms 3 4 2 4 INT conforms conforms 3 5 2 5 INT conforms conforms 3 6 2 6 INT conforms conforms 3 7 2 7 INT conforms conforms 3 8 2 8 INT conforms conforms 3 14 2 14 INT conforms conforms 3 15 2 15 INT active-lo level 1 4:A 2 19 INT active-lo level 1 5:A 2 16 INT active-lo level 0 10:A 2 18 INT active-lo level 2 4:A 2 16 INT active-lo level 2 5:A 2 17 -- Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID INT# ExtINT active-hi edge 3 0 255 0 NMI active-hi edge 3 0 255 1 ------------------------------------------------------------------------------- # SMP kernel config file options: options SMP # Symmetric MultiProcessor Kernel #options APIC_IO # Symmetric (APIC) I/O options NCPU=2 # number of CPUs options NBUS=4 # number of busses options NAPIC=1 # number of IO APICs options NINTR=16 # number of INTs ===============================================================================
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