From owner-svn-src-stable-8@FreeBSD.ORG Thu Nov 25 18:21:08 2010 Return-Path: Delivered-To: svn-src-stable-8@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id F1C9910656A4; Thu, 25 Nov 2010 18:21:08 +0000 (UTC) (envelope-from delphij@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id DDA118FC0C; Thu, 25 Nov 2010 18:21:08 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id oAPIL82w013255; Thu, 25 Nov 2010 18:21:08 GMT (envelope-from delphij@svn.freebsd.org) Received: (from delphij@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id oAPIL8ht013252; Thu, 25 Nov 2010 18:21:08 GMT (envelope-from delphij@svn.freebsd.org) Message-Id: <201011251821.oAPIL8ht013252@svn.freebsd.org> From: Xin LI Date: Thu, 25 Nov 2010 18:21:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org X-SVN-Group: stable-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r215825 - stable/8/sys/dev/arcmsr X-BeenThere: svn-src-stable-8@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for only the 8-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 Nov 2010 18:21:09 -0000 Author: delphij Date: Thu Nov 25 18:21:08 2010 New Revision: 215825 URL: http://svn.freebsd.org/changeset/base/215825 Log: MFC r215234: Update to vendor release 1.20.00.19. Bug fixes: * Fixed "inquiry data fails comparion at DV1 step" * Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B * Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0 Many thanks to Areca for continuing to support FreeBSD. MFC r215280: Workaround build for PAE case for now - revert the PHYS case to previous panic behavior. Modified: stable/8/sys/dev/arcmsr/arcmsr.c stable/8/sys/dev/arcmsr/arcmsr.h Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) Modified: stable/8/sys/dev/arcmsr/arcmsr.c ============================================================================== --- stable/8/sys/dev/arcmsr/arcmsr.c Thu Nov 25 18:20:28 2010 (r215824) +++ stable/8/sys/dev/arcmsr/arcmsr.c Thu Nov 25 18:21:08 2010 (r215825) @@ -38,29 +38,32 @@ ** History ** ** REV# DATE NAME DESCRIPTION -** 1.00.00.00 3/31/2004 Erich Chen First release -** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error -** 1.20.00.03 4/19/2005 Erich Chen add SATA 24 Ports adapter type support +** 1.00.00.00 3/31/2004 Erich Chen First release +** 1.20.00.02 11/29/2004 Erich Chen bug fix with arcmsr_bus_reset when PHY error +** 1.20.00.03 4/19/2005 Erich Chen add SATA 24 Ports adapter type support ** clean unused function -** 1.20.00.12 9/12/2005 Erich Chen bug fix with abort command handling, +** 1.20.00.12 9/12/2005 Erich Chen bug fix with abort command handling, ** firmware version check ** and firmware update notify for hardware bug fix ** handling if none zero high part physical address ** of srb resource -** 1.20.00.13 8/18/2006 Erich Chen remove pending srb and report busy +** 1.20.00.13 8/18/2006 Erich Chen remove pending srb and report busy ** add iop message xfer ** with scsi pass-through command ** add new device id of sas raid adapters ** code fit for SPARC64 & PPC -** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report +** 1.20.00.14 02/05/2007 Erich Chen bug fix for incorrect ccb_h.status report ** and cause g_vfs_done() read write error -** 1.20.00.15 10/10/2007 Erich Chen support new RAID adapter type ARC120x -** 1.20.00.16 10/10/2009 Erich Chen Bug fix for RAID adapter type ARC120x +** 1.20.00.15 10/10/2007 Erich Chen support new RAID adapter type ARC120x +** 1.20.00.16 10/10/2009 Erich Chen Bug fix for RAID adapter type ARC120x ** bus_dmamem_alloc() with BUS_DMA_ZERO -** 1.20.00.17 07/15/2010 Ching Huang Added support ARC1880 -** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed, -** prevent cam_periph_error removing all LUN devices of one Target id -** for any one LUN device failed +** 1.20.00.17 07/15/2010 Ching Huang Added support ARC1880 +** report CAM_DEV_NOT_THERE instead of CAM_SEL_TIMEOUT when device failed, +** prevent cam_periph_error removing all LUN devices of one Target id +** for any one LUN device failed +** 1.20.00.18 10/14/2010 Ching Huang Fixed "inquiry data fails comparion at DV1 step" +** 10/25/2010 Ching Huang Fixed bad range input in bus_alloc_resource for ADAPTER_TYPE_B +** 1.20.00.19 11/11/2010 Ching Huang Fixed arcmsr driver prevent arcsas support for Areca SAS HBA ARC13x0 ****************************************************************************************** * $FreeBSD$ */ @@ -116,7 +119,7 @@ #define ARCMSR_LOCK_RELEASE(l) mtx_unlock(l) #define ARCMSR_LOCK_TRY(l) mtx_trylock(l) #define arcmsr_htole32(x) htole32(x) - typedef struct mtx arcmsr_lock_t; + typedef struct mtx arcmsr_lock_t; #else #include #include @@ -134,13 +137,14 @@ #define CAM_NEW_TRAN_CODE 1 #endif +#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.19 2010-11-11" #include #define ARCMSR_SRBS_POOL_SIZE ((sizeof(struct CommandControlBlock) * ARCMSR_MAX_FREESRB_NUM)) /* ************************************************************************** ************************************************************************** */ -#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r)) +#define CHIP_REG_READ32(s, b, r) bus_space_read_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r)) #define CHIP_REG_WRITE32(s, b, r, d) bus_space_write_4(acb->btag[b], acb->bhandle[b], offsetof(struct s, r), d) /* ************************************************************************** @@ -182,8 +186,8 @@ static void UDELAY(u_int32_t us) { DELAY ************************************************************************** ************************************************************************** */ -static bus_dmamap_callback_t arcmsr_map_freesrb; -static bus_dmamap_callback_t arcmsr_executesrb; +static bus_dmamap_callback_t arcmsr_map_free_srb; +static bus_dmamap_callback_t arcmsr_execute_srb; /* ************************************************************************** ************************************************************************** @@ -200,7 +204,7 @@ static device_method_t arcmsr_methods[]= DEVMETHOD(device_suspend, arcmsr_suspend), DEVMETHOD(device_resume, arcmsr_resume), DEVMETHOD(bus_print_child, bus_generic_print_child), - DEVMETHOD(bus_driver_added, bus_generic_driver_added), + DEVMETHOD(bus_driver_added, bus_generic_driver_added), { 0, 0 } }; @@ -226,29 +230,29 @@ static struct cdevsw arcmsr_cdevsw={ #if __FreeBSD_version > 502010 .d_version = D_VERSION, #endif - .d_flags = D_NEEDGIANT, - .d_open = arcmsr_open, /* open */ - .d_close = arcmsr_close, /* close */ - .d_ioctl = arcmsr_ioctl, /* ioctl */ - .d_name = "arcmsr", /* name */ + .d_flags = D_NEEDGIANT, + .d_open = arcmsr_open, /* open */ + .d_close = arcmsr_close, /* close */ + .d_ioctl = arcmsr_ioctl, /* ioctl */ + .d_name = "arcmsr", /* name */ }; #else #define ARCMSR_CDEV_MAJOR 180 static struct cdevsw arcmsr_cdevsw = { - arcmsr_open, /* open */ - arcmsr_close, /* close */ - noread, /* read */ - nowrite, /* write */ - arcmsr_ioctl, /* ioctl */ - nopoll, /* poll */ - nommap, /* mmap */ - nostrategy, /* strategy */ - "arcmsr", /* name */ - ARCMSR_CDEV_MAJOR, /* major */ - nodump, /* dump */ - nopsize, /* psize */ - 0 /* flags */ + arcmsr_open, /* open */ + arcmsr_close, /* close */ + noread, /* read */ + nowrite, /* write */ + arcmsr_ioctl, /* ioctl */ + nopoll, /* poll */ + nommap, /* mmap */ + nostrategy, /* strategy */ + "arcmsr", /* name */ + ARCMSR_CDEV_MAJOR, /* major */ + nodump, /* dump */ + nopsize, /* psize */ + 0 /* flags */ }; #endif /* @@ -259,9 +263,9 @@ static struct cdevsw arcmsr_cdevsw = { static int arcmsr_open(dev_t dev, int flags, int fmt, struct proc *proc) #else #if __FreeBSD_version < 503000 - static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) + static int arcmsr_open(dev_t dev, int flags, int fmt, struct thread *proc) #else - static int arcmsr_open(struct cdev *dev, int flags, int fmt, struct thread *proc) + static int arcmsr_open(struct cdev *dev, int flags, int fmt, struct thread *proc) #endif #endif { @@ -284,9 +288,9 @@ static struct cdevsw arcmsr_cdevsw = { static int arcmsr_close(dev_t dev, int flags, int fmt, struct proc *proc) #else #if __FreeBSD_version < 503000 - static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) + static int arcmsr_close(dev_t dev, int flags, int fmt, struct thread *proc) #else - static int arcmsr_close(struct cdev *dev, int flags, int fmt, struct thread *proc) + static int arcmsr_close(struct cdev *dev, int flags, int fmt, struct thread *proc) #endif #endif { @@ -309,9 +313,9 @@ static struct cdevsw arcmsr_cdevsw = { static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct proc *proc) #else #if __FreeBSD_version < 503000 - static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) + static int arcmsr_ioctl(dev_t dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) #else - static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) + static int arcmsr_ioctl(struct cdev *dev, u_long ioctl_cmd, caddr_t arg, int flags, struct thread *proc) #endif #endif { @@ -345,7 +349,7 @@ static u_int32_t arcmsr_disable_allintr( case ACB_ADAPTER_TYPE_B: { /* disable all outbound interrupt */ intmask_org=CHIP_REG_READ32(HBB_DOORBELL, - 0, iop2drv_doorbell_mask) & (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); /* disable outbound message0 int */ + 0, iop2drv_doorbell_mask) & (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); /* disable outbound message0 int */ CHIP_REG_WRITE32(HBB_DOORBELL, 0, iop2drv_doorbell_mask, 0); /* disable all interrupt */ } break; @@ -584,42 +588,6 @@ static void arcmsr_async(void *cb_arg, u ********************************************************************** ********************************************************************** */ -static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) -{ - struct AdapterControlBlock *acb=srb->acb; - union ccb * pccb=srb->pccb; - - if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { - bus_dmasync_op_t op; - - if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { - op = BUS_DMASYNC_POSTREAD; - } else { - op = BUS_DMASYNC_POSTWRITE; - } - bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); - bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); - } - if(stand_flag==1) { - atomic_subtract_int(&acb->srboutstandingcount, 1); - if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) && ( - acb->srboutstandingcount < ARCMSR_RELEASE_SIMQ_LEVEL)) { - acb->acb_flags &= ~ACB_F_CAM_DEV_QFRZN; - pccb->ccb_h.status |= CAM_RELEASE_SIMQ; - } - } - srb->startdone=ARCMSR_SRB_DONE; - srb->srb_flags=0; - acb->srbworkingQ[acb->workingsrb_doneindex]=srb; - acb->workingsrb_doneindex++; - acb->workingsrb_doneindex %= ARCMSR_MAX_FREESRB_NUM; - xpt_done(pccb); - return; -} -/* -********************************************************************** -********************************************************************** -*/ static void arcmsr_report_sense_info(struct CommandControlBlock *srb) { union ccb * pccb=srb->pccb; @@ -695,6 +663,42 @@ static void arcmsr_abort_allcmd(struct A return; } /* +********************************************************************** +********************************************************************** +*/ +static void arcmsr_srb_complete(struct CommandControlBlock *srb, int stand_flag) +{ + struct AdapterControlBlock *acb=srb->acb; + union ccb * pccb=srb->pccb; + + if((pccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { + bus_dmasync_op_t op; + + if((pccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { + op = BUS_DMASYNC_POSTREAD; + } else { + op = BUS_DMASYNC_POSTWRITE; + } + bus_dmamap_sync(acb->dm_segs_dmat, srb->dm_segs_dmamap, op); + bus_dmamap_unload(acb->dm_segs_dmat, srb->dm_segs_dmamap); + } + if(stand_flag==1) { + atomic_subtract_int(&acb->srboutstandingcount, 1); + if((acb->acb_flags & ACB_F_CAM_DEV_QFRZN) && ( + acb->srboutstandingcount < ARCMSR_RELEASE_SIMQ_LEVEL)) { + acb->acb_flags &= ~ACB_F_CAM_DEV_QFRZN; + pccb->ccb_h.status |= CAM_RELEASE_SIMQ; + } + } + srb->startdone=ARCMSR_SRB_DONE; + srb->srb_flags=0; + acb->srbworkingQ[acb->workingsrb_doneindex]=srb; + acb->workingsrb_doneindex++; + acb->workingsrb_doneindex %= ARCMSR_MAX_FREESRB_NUM; + xpt_done(pccb); + return; +} +/* ************************************************************************** ************************************************************************** */ @@ -1009,8 +1013,8 @@ static void arcmsr_post_srb(struct Adapt { CHIP_REG_WRITE32(HBC_MessageUnit,0,inbound_queueport_low, ccb_post_stamp); } - } - break; + } + break; } return; } @@ -1595,7 +1599,7 @@ static void arcmsr_hbb_postqueue_isr(str u_int32_t flag_srb; int index; u_int16_t error; - + /* ***************************************************************************** ** areca cdb command done @@ -2236,7 +2240,7 @@ message_out: ********************************************************************* ********************************************************************* */ -static void arcmsr_executesrb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) +static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error) { struct CommandControlBlock *srb=(struct CommandControlBlock *)arg; struct AdapterControlBlock *acb=(struct AdapterControlBlock *)srb->acb; @@ -2386,18 +2390,16 @@ static void arcmsr_handle_virtual_comman xpt_done(pccb); return; } - inqdata[0] = T_PROCESSOR; - /* Periph Qualifier & Periph Dev Type */ - inqdata[1] = 0; - /* rem media bit & Dev Type Modifier */ - inqdata[2] = 0; - /* ISO, ECMA, & ANSI versions */ - inqdata[4] = 31; - /* length of additional data */ - strncpy(&inqdata[8], "Areca ", 8); - /* Vendor Identification */ - strncpy(&inqdata[16], "RAID controller ", 16); - /* Product Identification */ + inqdata[0] = T_PROCESSOR; /* Periph Qualifier & Periph Dev Type */ + inqdata[1] = 0; /* rem media bit & Dev Type Modifier */ + inqdata[2] = 0; /* ISO, ECMA, & ANSI versions */ + inqdata[3] = 0; + inqdata[4] = 31; /* length of additional data */ + inqdata[5] = 0; + inqdata[6] = 0; + inqdata[7] = 0; + strncpy(&inqdata[8], "Areca ", 8); /* Vendor Identification */ + strncpy(&inqdata[16], "RAID controller ", 16); /* Product Identification */ strncpy(&inqdata[32], "R001", 4); /* Product Revision */ memcpy(buffer, inqdata, sizeof(inqdata)); xpt_done(pccb); @@ -2460,15 +2462,23 @@ static void arcmsr_action(struct cam_sim , srb->dm_segs_dmamap , pccb->csio.data_ptr , pccb->csio.dxfer_len - , arcmsr_executesrb, srb, /*flags*/0); + , arcmsr_execute_srb, srb, /*flags*/0); if(error == EINPROGRESS) { xpt_freeze_simq(acb->psim, 1); pccb->ccb_h.status |= CAM_RELEASE_SIMQ; } splx(s); - } else { - /* Buffer is physical */ + } + else { /* Buffer is physical */ +#ifdef PAE panic("arcmsr: CAM_DATA_PHYS not supported"); +#else + struct bus_dma_segment seg; + + seg.ds_addr = (bus_addr_t)pccb->csio.data_ptr; + seg.ds_len = pccb->csio.dxfer_len; + arcmsr_execute_srb(srb, &seg, 1, 0); +#endif } } else { /* Scatter/gather list */ @@ -2482,10 +2492,10 @@ static void arcmsr_action(struct cam_sim return; } segs=(struct bus_dma_segment *)pccb->csio.data_ptr; - arcmsr_executesrb(srb, segs, pccb->csio.sglist_cnt, 0); + arcmsr_execute_srb(srb, segs, pccb->csio.sglist_cnt, 0); } } else { - arcmsr_executesrb(srb, NULL, 0, 0); + arcmsr_execute_srb(srb, NULL, 0, 0); } break; } @@ -3204,7 +3214,7 @@ static u_int32_t arcmsr_iop_confirm(stru return FALSE; } post_queue_phyaddr = srb_phyaddr + ARCMSR_MAX_FREESRB_NUM*sizeof(struct CommandControlBlock) - + offsetof(struct HBB_MessageUnit, post_qbuffer); + + offsetof(struct HBB_MessageUnit, post_qbuffer); CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[0], ARCMSR_SIGNATURE_SET_CONFIG); /* driver "set config" signature */ CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[1], srb_phyaddr_hi32); /* normal should be zero */ CHIP_REG_WRITE32(HBB_RWBUFFER, 1, msgcode_rwbuffer[2], post_queue_phyaddr); /* postQ size (256+8)*4 */ @@ -3288,7 +3298,7 @@ static void arcmsr_iop_init(struct Adapt ********************************************************************** ********************************************************************** */ -static void arcmsr_map_freesrb(void *arg, bus_dma_segment_t *segs, int nseg, int error) +static void arcmsr_map_free_srb(void *arg, bus_dma_segment_t *segs, int nseg, int error) { struct AdapterControlBlock *acb=arg; struct CommandControlBlock *srb_tmp; @@ -3351,6 +3361,7 @@ static u_int32_t arcmsr_initialize(devic max_coherent_size=ARCMSR_SRBS_POOL_SIZE; } break; + case PCIDevVenIDARC1200: case PCIDevVenIDARC1201: { acb->adapter_type=ACB_ADAPTER_TYPE_B; max_coherent_size=ARCMSR_SRBS_POOL_SIZE+(sizeof(struct HBB_MessageUnit)); @@ -3364,7 +3375,9 @@ static u_int32_t arcmsr_initialize(devic case PCIDevVenIDARC1210: case PCIDevVenIDARC1220: case PCIDevVenIDARC1230: + case PCIDevVenIDARC1231: case PCIDevVenIDARC1260: + case PCIDevVenIDARC1261: case PCIDevVenIDARC1270: case PCIDevVenIDARC1280: case PCIDevVenIDARC1212: @@ -3383,108 +3396,71 @@ static u_int32_t arcmsr_initialize(devic return ENOMEM; } } + if(bus_dma_tag_create( /*parent*/ NULL, + /*alignemnt*/ 1, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, + /*nsegments*/ BUS_SPACE_UNRESTRICTED, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, #if __FreeBSD_version >= 502010 - if(bus_dma_tag_create( /*parent*/ NULL, - /*alignemnt*/ 1, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, - /*nsegments*/ BUS_SPACE_UNRESTRICTED, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - /*lockfunc*/ NULL, - /*lockarg*/ NULL, - &acb->parent_dmat) != 0) -#else - if(bus_dma_tag_create( /*parent*/ NULL, - /*alignemnt*/ 1, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ BUS_SPACE_MAXSIZE_32BIT, - /*nsegments*/ BUS_SPACE_UNRESTRICTED, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - &acb->parent_dmat) != 0) + /*lockfunc*/ NULL, + /*lockarg*/ NULL, #endif + &acb->parent_dmat) != 0) { printf("arcmsr%d: parent_dmat bus_dma_tag_create failure!\n", device_get_unit(dev)); return ENOMEM; } + /* Create a single tag describing a region large enough to hold all of the s/g lists we will need. */ -#if __FreeBSD_version >= 502010 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 1, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ MAXBSIZE, - /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - /*lockfunc*/ busdma_lock_mutex, + /*alignment*/ 1, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ ARCMSR_MAX_SG_ENTRIES * PAGE_SIZE * ARCMSR_MAX_FREESRB_NUM, + /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, +#if __FreeBSD_version >= 502010 + /*lockfunc*/ busdma_lock_mutex, #if __FreeBSD_version >= 700025 - /*lockarg*/ &acb->qbuffer_lock, + /*lockarg*/ &acb->qbuffer_lock, #else - /*lockarg*/ &Giant, + /*lockarg*/ &Giant, #endif - &acb->dm_segs_dmat) != 0) -#else - if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 1, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ MAXBSIZE, - /*nsegments*/ ARCMSR_MAX_SG_ENTRIES, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - &acb->dm_segs_dmat) != 0) #endif + &acb->dm_segs_dmat) != 0) { bus_dma_tag_destroy(acb->parent_dmat); printf("arcmsr%d: dm_segs_dmat bus_dma_tag_create failure!\n", device_get_unit(dev)); return ENOMEM; } + /* DMA tag for our srb structures.... Allocate the freesrb memory */ -#if __FreeBSD_version >= 502010 if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 0x20, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ max_coherent_size, - /*nsegments*/ 1, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - /*lockfunc*/ NULL, - /*lockarg*/ NULL, - &acb->srb_dmat) != 0) -#else - if(bus_dma_tag_create( /*parent_dmat*/ acb->parent_dmat, - /*alignment*/ 0x20, - /*boundary*/ 0, - /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, - /*highaddr*/ BUS_SPACE_MAXADDR, - /*filter*/ NULL, - /*filterarg*/ NULL, - /*maxsize*/ max_coherent_size, - /*nsegments*/ 1, - /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, - /*flags*/ 0, - &acb->srb_dmat) != 0) + /*alignment*/ 0x20, + /*boundary*/ 0, + /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, + /*highaddr*/ BUS_SPACE_MAXADDR, + /*filter*/ NULL, + /*filterarg*/ NULL, + /*maxsize*/ max_coherent_size, + /*nsegments*/ 1, + /*maxsegsz*/ BUS_SPACE_MAXSIZE_32BIT, + /*flags*/ 0, +#if __FreeBSD_version >= 502010 + /*lockfunc*/ NULL, + /*lockarg*/ NULL, #endif + &acb->srb_dmat) != 0) { bus_dma_tag_destroy(acb->dm_segs_dmat); bus_dma_tag_destroy(acb->parent_dmat); @@ -3500,7 +3476,7 @@ static u_int32_t arcmsr_initialize(devic return ENXIO; } /* And permanently map them */ - if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr, max_coherent_size, arcmsr_map_freesrb, acb, /*flags*/0)) { + if(bus_dmamap_load(acb->srb_dmat, acb->srb_dmamap, acb->uncacheptr, max_coherent_size, arcmsr_map_free_srb, acb, /*flags*/0)) { bus_dma_tag_destroy(acb->srb_dmat); bus_dma_tag_destroy(acb->dm_segs_dmat); bus_dma_tag_destroy(acb->parent_dmat); @@ -3518,7 +3494,7 @@ static u_int32_t arcmsr_initialize(devic case ACB_ADAPTER_TYPE_A: { u_int32_t rid0=PCIR_BAR(0); vm_offset_t mem_base0; - + acb->sys_res_arcmsr[0]=bus_alloc_resource(dev,SYS_RES_MEMORY, &rid0, 0ul, ~0ul, 0x1000, RF_ACTIVE); if(acb->sys_res_arcmsr[0] == NULL) { arcmsr_free_resource(acb); @@ -3549,10 +3525,10 @@ static u_int32_t arcmsr_initialize(devic for(i=0; i<2; i++) { if(i==0) { acb->sys_res_arcmsr[i]=bus_alloc_resource(dev,SYS_RES_MEMORY, &rid[i], - 0x20400, 0x20400+sizeof(struct HBB_DOORBELL), sizeof(struct HBB_DOORBELL), RF_ACTIVE); + 0ul, ~0ul, sizeof(struct HBB_DOORBELL), RF_ACTIVE); } else { acb->sys_res_arcmsr[i]=bus_alloc_resource(dev, SYS_RES_MEMORY, &rid[i], - 0x0fa00, 0x0fa00+sizeof(struct HBB_RWBUFFER), sizeof(struct HBB_RWBUFFER), RF_ACTIVE); + 0ul, ~0ul, sizeof(struct HBB_RWBUFFER), RF_ACTIVE); } if(acb->sys_res_arcmsr[i] == NULL) { arcmsr_free_resource(acb); @@ -3751,6 +3727,7 @@ static int arcmsr_probe(device_t dev) { u_int32_t id; static char buf[256]; + char x_type[]={"X-TYPE"}; char *type; int raid6 = 1; @@ -3759,8 +3736,9 @@ static int arcmsr_probe(device_t dev) } switch(id=pci_get_devid(dev)) { case PCIDevVenIDARC1110: - case PCIDevVenIDARC1210: + case PCIDevVenIDARC1200: case PCIDevVenIDARC1201: + case PCIDevVenIDARC1210: raid6 = 0; /*FALLTHRU*/ case PCIDevVenIDARC1120: @@ -3769,7 +3747,9 @@ static int arcmsr_probe(device_t dev) case PCIDevVenIDARC1170: case PCIDevVenIDARC1220: case PCIDevVenIDARC1230: + case PCIDevVenIDARC1231: case PCIDevVenIDARC1260: + case PCIDevVenIDARC1261: case PCIDevVenIDARC1270: case PCIDevVenIDARC1280: type = "SATA"; @@ -3786,9 +3766,11 @@ static int arcmsr_probe(device_t dev) type = "SAS 6G"; break; default: - type = "X-TYPE"; + type = x_type; break; } + if(type == x_type) + return(ENXIO); sprintf(buf, "Areca %s Host Adapter RAID Controller %s\n", type, raid6 ? "(RAID6 capable)" : ""); device_set_desc_copy(dev, buf); return 0; Modified: stable/8/sys/dev/arcmsr/arcmsr.h ============================================================================== --- stable/8/sys/dev/arcmsr/arcmsr.h Thu Nov 25 18:20:28 2010 (r215824) +++ stable/8/sys/dev/arcmsr/arcmsr.h Thu Nov 25 18:21:08 2010 (r215825) @@ -37,22 +37,21 @@ ************************************************************************** * $FreeBSD$ */ -#define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.17 2010-07-15" -#define ARCMSR_SCSI_INITIATOR_ID 255 -#define ARCMSR_DEV_SECTOR_SIZE 512 -#define ARCMSR_MAX_XFER_SECTORS 4096 -#define ARCMSR_MAX_TARGETID 17 /*16 max target id + 1*/ -#define ARCMSR_MAX_TARGETLUN 8 /*8*/ -#define ARCMSR_MAX_CHIPTYPE_NUM 4 -#define ARCMSR_MAX_OUTSTANDING_CMD 256 -#define ARCMSR_MAX_START_JOB 257 -#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD -#define ARCMSR_MAX_FREESRB_NUM 320 -#define ARCMSR_MAX_QBUFFER 4096 /* ioctl QBUFFER */ -#define ARCMSR_MAX_SG_ENTRIES 38 /* max 38*/ -#define ARCMSR_MAX_ADAPTER 4 -#define ARCMSR_RELEASE_SIMQ_LEVEL 230 -#define ARCMSR_MAX_HBB_POSTQUEUE 264 /* (ARCMSR_MAX_OUTSTANDING_CMD+8) */ +#define ARCMSR_SCSI_INITIATOR_ID 255 +#define ARCMSR_DEV_SECTOR_SIZE 512 +#define ARCMSR_MAX_XFER_SECTORS 4096 +#define ARCMSR_MAX_TARGETID 17 /*16 max target id + 1*/ +#define ARCMSR_MAX_TARGETLUN 8 /*8*/ +#define ARCMSR_MAX_CHIPTYPE_NUM 4 +#define ARCMSR_MAX_OUTSTANDING_CMD 256 +#define ARCMSR_MAX_START_JOB 257 +#define ARCMSR_MAX_CMD_PERLUN ARCMSR_MAX_OUTSTANDING_CMD +#define ARCMSR_MAX_FREESRB_NUM 320 +#define ARCMSR_MAX_QBUFFER 4096 /* ioctl QBUFFER */ +#define ARCMSR_MAX_SG_ENTRIES 38 /* max 38*/ +#define ARCMSR_MAX_ADAPTER 4 +#define ARCMSR_RELEASE_SIMQ_LEVEL 230 +#define ARCMSR_MAX_HBB_POSTQUEUE 264 /* (ARCMSR_MAX_OUTSTANDING_CMD+8) */ /* ********************************************************************* */ @@ -74,45 +73,51 @@ ** ********************************************************************************** */ -#define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */ -#define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1220 0x1220 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1230 0x1230 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1260 0x1260 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1270 0x1270 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1280 0x1280 /* Device ID */ +#define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */ +#define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1210 0x1210 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1212 0x1212 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1220 0x1220 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1222 0x1222 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1380 0x1380 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1381 0x1381 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1680 0x1680 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1681 0x1681 /* Device ID */ -#define PCI_DEVICE_ID_ARECA_1201 0x1201 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1230 0x1230 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1231 0x1231 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1260 0x1260 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1261 0x1261 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1270 0x1270 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1280 0x1280 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1380 0x1380 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1381 0x1381 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1680 0x1680 /* Device ID */ +#define PCI_DEVICE_ID_ARECA_1681 0x1681 /* Device ID */ #define PCI_DEVICE_ID_ARECA_1880 0x1880 /* Device ID */ -#define PCIDevVenIDARC1110 0x111017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1120 0x112017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1130 0x113017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1160 0x116017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1170 0x117017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1210 0x121017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1220 0x122017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1230 0x123017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1260 0x126017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1270 0x127017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1280 0x128017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1110 0x111017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1120 0x112017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1130 0x113017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1160 0x116017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1170 0x117017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1200 0x120017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1201 0x120117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1210 0x121017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1212 0x121217D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1220 0x122017D3 /* Vendor Device ID */ #define PCIDevVenIDARC1222 0x122217D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1380 0x138017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1381 0x138117D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1680 0x168017D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1681 0x168117D3 /* Vendor Device ID */ -#define PCIDevVenIDARC1201 0x120117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1230 0x123017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1231 0x123117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1260 0x126017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1261 0x126117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1270 0x127017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1280 0x128017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1380 0x138017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1381 0x138117D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1680 0x168017D3 /* Vendor Device ID */ +#define PCIDevVenIDARC1681 0x168117D3 /* Vendor Device ID */ #define PCIDevVenIDARC1880 0x188017D3 /* Vendor Device ID */ #ifndef PCIR_BARS @@ -120,30 +125,30 @@ #define PCIR_BAR(x) (PCIR_BARS + (x) * 4) #endif -#define PCI_BASE_ADDR0 0x10 -#define PCI_BASE_ADDR1 0x14 -#define PCI_BASE_ADDR2 0x18 -#define PCI_BASE_ADDR3 0x1C -#define PCI_BASE_ADDR4 0x20 -#define PCI_BASE_ADDR5 0x24 +#define PCI_BASE_ADDR0 0x10 +#define PCI_BASE_ADDR1 0x14 +#define PCI_BASE_ADDR2 0x18 +#define PCI_BASE_ADDR3 0x1C +#define PCI_BASE_ADDR4 0x20 +#define PCI_BASE_ADDR5 0x24 /* ********************************************************************************** ** ********************************************************************************** */ -#define ARCMSR_SCSICMD_IOCTL 0x77 -#define ARCMSR_CDEVSW_IOCTL 0x88 -#define ARCMSR_MESSAGE_FAIL 0x0001 -#define ARCMSR_MESSAGE_SUCCESS 0x0000 +#define ARCMSR_SCSICMD_IOCTL 0x77 +#define ARCMSR_CDEVSW_IOCTL 0x88 +#define ARCMSR_MESSAGE_FAIL 0x0001 +#define ARCMSR_MESSAGE_SUCCESS 0x0000 /* ********************************************************************************** ** ********************************************************************************** */ -#define arcmsr_ccbsrb_ptr spriv_ptr0 -#define arcmsr_ccbacb_ptr spriv_ptr1 -#define dma_addr_hi32(addr) (u_int32_t) ((addr>>16)>>16) -#define dma_addr_lo32(addr) (u_int32_t) (addr & 0xffffffff) +#define arcmsr_ccbsrb_ptr spriv_ptr0 +#define arcmsr_ccbacb_ptr spriv_ptr1 +#define dma_addr_hi32(addr) (u_int32_t) ((addr>>16)>>16) +#define dma_addr_lo32(addr) (u_int32_t) (addr & 0xffffffff) #define get_min(x,y) ((x) < (y) ? (x) : (y)) #define get_max(x,y) ((x) < (y) ? (y) : (x)) /* @@ -210,9 +215,9 @@ struct CMD_MESSAGE_FIELD { #define ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE _IOWR('F', FUNCTION_FLUSH_ADAPTER_CACHE, struct CMD_MESSAGE_FIELD) /* ARECA IOCTL ReturnCode */ -#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 -#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 -#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F +#define ARCMSR_MESSAGE_RETURNCODE_OK 0x00000001 +#define ARCMSR_MESSAGE_RETURNCODE_ERROR 0x00000006 +#define ARCMSR_MESSAGE_RETURNCODE_3F 0x0000003F #define ARCMSR_IOCTL_RETURNCODE_BUS_HANG_ON 0x00000088 /* ************************************************************************ @@ -533,32 +538,32 @@ struct CMD_MESSAGE_FIELD { ************************************************************************************************ */ /* signature of set and get firmware config */ -#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 -#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 +#define ARCMSR_SIGNATURE_GET_CONFIG 0x87974060 +#define ARCMSR_SIGNATURE_SET_CONFIG 0x87974063 /* message code of inbound message register */ -#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 -#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 -#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 -#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 -#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 -#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 -#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 -#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 -#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 +#define ARCMSR_INBOUND_MESG0_NOP 0x00000000 +#define ARCMSR_INBOUND_MESG0_GET_CONFIG 0x00000001 +#define ARCMSR_INBOUND_MESG0_SET_CONFIG 0x00000002 +#define ARCMSR_INBOUND_MESG0_ABORT_CMD 0x00000003 +#define ARCMSR_INBOUND_MESG0_STOP_BGRB 0x00000004 +#define ARCMSR_INBOUND_MESG0_FLUSH_CACHE 0x00000005 +#define ARCMSR_INBOUND_MESG0_START_BGRB 0x00000006 +#define ARCMSR_INBOUND_MESG0_CHK331PENDING 0x00000007 +#define ARCMSR_INBOUND_MESG0_SYNC_TIMER 0x00000008 /* doorbell interrupt generator */ -#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 -#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 -#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 -#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 +#define ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK 0x00000001 +#define ARCMSR_INBOUND_DRIVER_DATA_READ_OK 0x00000002 +#define ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 0x00000001 +#define ARCMSR_OUTBOUND_IOP331_DATA_READ_OK 0x00000002 /* srb areca cdb flag */ -#define ARCMSR_SRBPOST_FLAG_SGL_BSIZE 0x80000000 -#define ARCMSR_SRBPOST_FLAG_IAM_BIOS 0x40000000 -#define ARCMSR_SRBREPLY_FLAG_IAM_BIOS 0x40000000 -#define ARCMSR_SRBREPLY_FLAG_ERROR 0x10000000 +#define ARCMSR_SRBPOST_FLAG_SGL_BSIZE 0x80000000 +#define ARCMSR_SRBPOST_FLAG_IAM_BIOS 0x40000000 +#define ARCMSR_SRBREPLY_FLAG_IAM_BIOS 0x40000000 +#define ARCMSR_SRBREPLY_FLAG_ERROR 0x10000000 #define ARCMSR_SRBREPLY_FLAG_ERROR_MODE0 0x10000000 #define ARCMSR_SRBREPLY_FLAG_ERROR_MODE1 0x00000001 /* outbound firmware ok */ -#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 +#define ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK 0x80000000 /* ********************************** ** @@ -603,15 +608,15 @@ struct QBUFFER { #define ARCMSR_FW_CFGVER_OFFSET 25 struct FIRMWARE_INFO { - u_int32_t signature; /*0,00-03*/ - u_int32_t request_len; /*1,04-07*/ - u_int32_t numbers_queue; /*2,08-11*/ - u_int32_t sdram_size; /*3,12-15*/ - u_int32_t ide_channels; /*4,16-19*/ - char vendor[40]; /*5,20-59*/ - char model[8]; /*15,60-67*/ - char firmware_ver[16]; /*17,68-83*/ - char device_map[16]; /*21,84-99*/ + u_int32_t signature; /*0,00-03*/ + u_int32_t request_len; /*1,04-07*/ + u_int32_t numbers_queue; /*2,08-11*/ + u_int32_t sdram_size; /*3,12-15*/ + u_int32_t ide_channels; /*4,16-19*/ + char vendor[40]; /*5,20-59*/ + char model[8]; /*15,60-67*/ + char firmware_ver[16]; /*17,68-83*/ + char device_map[16]; /*21,84-99*/ u_int32_t cfgVersion; /*25,100-103 Added for checking of new firmware capability*/ char cfgSerial[16]; /*26,104-119*/ u_int32_t cfgPicStatus; /*30,120-123*/ @@ -649,33 +654,33 @@ struct FIRMWARE_INFO { ************************************************************************************************ */ struct ARCMSR_CDB { - u_int8_t Bus; /* 00h should be 0 */ - u_int8_t TargetID; /* 01h should be 0--15 */ - u_int8_t LUN; /* 02h should be 0--7 */ - u_int8_t Function; /* 03h should be 1 */ + u_int8_t Bus; /* 00h should be 0 */ + u_int8_t TargetID; /* 01h should be 0--15 */ + u_int8_t LUN; /* 02h should be 0--7 */ + u_int8_t Function; /* 03h should be 1 */ - u_int8_t CdbLength; /* 04h not used now */ - u_int8_t sgcount; /* 05h */ - u_int8_t Flags; /* 06h */ -#define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 /* bit 0: 0(256) / 1(512) bytes */ -#define ARCMSR_CDB_FLAG_BIOS 0x02 /* bit 1: 0(from driver) / 1(from BIOS) */ -#define ARCMSR_CDB_FLAG_WRITE 0x04 /* bit 2: 0(Data in) / 1(Data out) */ -#define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 /* bit 4/3 ,00 : simple Q,01 : head of Q,10 : ordered Q */ -#define ARCMSR_CDB_FLAG_HEADQ 0x08 -#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 + u_int8_t CdbLength; /* 04h not used now */ + u_int8_t sgcount; /* 05h */ + u_int8_t Flags; /* 06h */ +#define ARCMSR_CDB_FLAG_SGL_BSIZE 0x01 /* bit 0: 0(256) / 1(512) bytes */ +#define ARCMSR_CDB_FLAG_BIOS 0x02 /* bit 1: 0(from driver) / 1(from BIOS) */ +#define ARCMSR_CDB_FLAG_WRITE 0x04 /* bit 2: 0(Data in) / 1(Data out) */ +#define ARCMSR_CDB_FLAG_SIMPLEQ 0x00 /* bit 4/3 ,00 : simple Q,01 : head of Q,10 : ordered Q */ +#define ARCMSR_CDB_FLAG_HEADQ 0x08 +#define ARCMSR_CDB_FLAG_ORDEREDQ 0x10 u_int8_t msgPages; /* 07h */ - u_int32_t Context; /* 08h Address of this request */ - u_int32_t DataLength; /* 0ch not used now */ + u_int32_t Context; /* 08h Address of this request */ + u_int32_t DataLength; /* 0ch not used now */ - u_int8_t Cdb[16]; /* 10h SCSI CDB */ + u_int8_t Cdb[16]; /* 10h SCSI CDB */ /* ******************************************************** **Device Status : the same from SCSI bus if error occur ** SCSI bus status codes. ******************************************************** */ - u_int8_t DeviceStatus; /* 20h if error */ + u_int8_t DeviceStatus; /* 20h if error */ #define SCSISTAT_GOOD 0x00 #define SCSISTAT_CHECK_CONDITION 0x02 #define SCSISTAT_CONDITION_MET 0x04 @@ -685,15 +690,15 @@ struct ARCMSR_CDB { #define SCSISTAT_RESERVATION_CONFLICT 0x18 #define SCSISTAT_COMMAND_TERMINATED 0x22 #define SCSISTAT_QUEUE_FULL 0x28 -#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 -#define ARCMSR_DEV_ABORTED 0xF1 -#define ARCMSR_DEV_INIT_FAIL 0xF2 +#define ARCMSR_DEV_SELECT_TIMEOUT 0xF0 +#define ARCMSR_DEV_ABORTED 0xF1 +#define ARCMSR_DEV_INIT_FAIL 0xF2 - u_int8_t SenseData[15]; /* 21h output */ + u_int8_t SenseData[15]; /* 21h output */ union { - struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h Scatter gather address */ - struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h */ + struct SG32ENTRY sg32entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h Scatter gather address */ + struct SG64ENTRY sg64entry[ARCMSR_MAX_SG_ENTRIES]; /* 30h */ } u; }; /* @@ -706,23 +711,23 @@ struct ARCMSR_CDB { */ struct CommandControlBlock { struct ARCMSR_CDB arcmsr_cdb; /* 0 -503 (size of CDB=504): arcmsr messenger scsi command descriptor size 504 bytes */ - u_int32_t cdb_shifted_phyaddr; /* 504-507 */ + u_int32_t cdb_shifted_phyaddr; /* 504-507 */ u_int32_t arc_cdb_size; /* 508-511 */ /* ======================512+32 bytes============================ */ #if defined(__x86_64__) || defined(__amd64__) || defined(__ia64__) || defined(__sparc64__) || defined(__powerpc__) union ccb *pccb; /* 512-515 516-519 pointer of freebsd scsi command */ struct AdapterControlBlock *acb; /* 520-523 524-527 */ - bus_dmamap_t dm_segs_dmamap; /* 528-531 532-535 */ - u_int16_t srb_flags; /* 536-537 */ - u_int16_t startdone; /* 538-539 */ - u_int32_t reserved2; /* 540-543 */ + bus_dmamap_t dm_segs_dmamap; /* 528-531 532-535 */ + u_int16_t srb_flags; /* 536-537 */ + u_int16_t startdone; /* 538-539 */ + u_int32_t reserved2; /* 540-543 */ #else union ccb *pccb; /* 512-515 pointer of freebsd scsi command */ struct AdapterControlBlock *acb; /* 516-519 */ - bus_dmamap_t dm_segs_dmamap; /* 520-523 */ - u_int16_t srb_flags; /* 524-525 */ - u_int16_t startdone; /* 526-527 */ - u_int32_t reserved2[4]; /* 528-531 532-535 536-539 540-543 */ + bus_dmamap_t dm_segs_dmamap; /* 520-523 */ + u_int16_t srb_flags; /* 524-525 */ + u_int16_t startdone; /* 526-527 */ + u_int32_t reserved2[4]; /* 528-531 532-535 536-539 540-543 */ #endif /* ========================================================== */ /* struct callout ccb_callout; */ @@ -752,37 +757,37 @@ struct CommandControlBlock { *** DIFF OUTPUT TRUNCATED AT 1000 LINES ***