From owner-freebsd-hackers@FreeBSD.ORG Fri Jul 13 14:42:13 2012 Return-Path: Delivered-To: freebsd-hackers@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 909AE106564A; Fri, 13 Jul 2012 14:42:13 +0000 (UTC) (envelope-from phk@phk.freebsd.dk) Received: from phk.freebsd.dk (phk.freebsd.dk [130.225.244.222]) by mx1.freebsd.org (Postfix) with ESMTP id 4A74D8FC1A; Fri, 13 Jul 2012 14:42:13 +0000 (UTC) Received: from critter.freebsd.dk (unknown [192.168.48.2]) by phk.freebsd.dk (Postfix) with ESMTP id 4970E3B758; Fri, 13 Jul 2012 14:42:05 +0000 (UTC) Received: from critter.freebsd.dk (localhost [127.0.0.1]) by critter.freebsd.dk (8.14.5/8.14.5) with ESMTP id q6DEg46A044645; Fri, 13 Jul 2012 14:42:04 GMT (envelope-from phk@phk.freebsd.dk) To: John Baldwin From: "Poul-Henning Kamp" In-Reply-To: Your message of "Fri, 13 Jul 2012 08:31:59 -0400." <201207130831.59211.jhb@freebsd.org> Content-Type: text/plain; charset=ISO-8859-1 Date: Fri, 13 Jul 2012 14:42:04 +0000 Message-ID: <44644.1342190524@critter.freebsd.dk> X-Mailman-Approved-At: Fri, 13 Jul 2012 15:46:54 +0000 Cc: freebsd-hackers@freebsd.org, Bill Crisp Subject: Re: CVE-2012-0217 Intel's sysret Kernel Privilege Escalation and FreeBSD 6.2/6.3 X-BeenThere: freebsd-hackers@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Technical Discussions relating to FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Jul 2012 14:42:13 -0000 In message <201207130831.59211.jhb@freebsd.org>, John Baldwin writes: >Every FreeBSD/amd64 kernel in existent is vulnerable. In truth, my personal >opinion is that Intel screwed up their implementation of that instruction >whereas AMD got it right, and we are merely working around Intel's CPU bug. :( Given that the instruction set of AMD64 is defined by AMD originally, while Intel was trying very hard to ram Itanic down everybodys throat, that diagnosis is a given: Intel copied AMD, and difference in functionality is a screwup on Intels part, even if they documented their screwup in their manual. TL;DR: Which part of "compatible" doesn't Intel get ? -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 phk@FreeBSD.ORG | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence.