Date: Thu, 4 Nov 1999 23:59:54 -0800 (PST) From: "Rodney W. Grimes" <freebsd@gndrsh.dnsmgr.net> To: darrylo@sr.hp.com (Darryl Okahata) Cc: freebsd-smp@FreeBSD.ORG Subject: Re: Dual Celeron + FreeBSD? Message-ID: <199911050759.XAA52797@gndrsh.dnsmgr.net> In-Reply-To: <199911050203.SAA04671@mina.sr.hp.com> from Darryl Okahata at "Nov 4, 1999 06:03:36 pm"
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> "Rodney W. Grimes" <freebsd@gndrsh.dnsmgr.net> wrote: > > > They do not have to be the same stepping, they must be MP comptabile > > steppings per the Intel Processor Errata Data Sheet. This applies > > to all Intel MP capible processors, from the P54 (Pentium) to the > > PIII Xeon. > > > > Some combinations work, others do not. > > > > Also they _should_ be MP tested chips, which can be determined by > > the S-spec number and other markings on the chip. On Pentium in > > is the last letter of the markings like SSS or VSS or VSU, last > > letter being U means only tested for UP operation, last letter > > being S means tested for MP operation. > > Uh, the posters are talking about *Celerons*. > > Celerons are not supported for SMP operation, and are probably not > even tested for SMP, although many (most? all???) happen to work in an > SMP configuration. It's somewhat like overclocking: if it works, great -- > if it doesn't, don't expect much support (Intel won't support it, and > there's precious little help here). Celeron smeleron :-). They have S-Specs, they are cut from the same waffers, ever wonder why you can find a Celeron 400 PPGA with the same S-Spec number as a P3 450 except the last digit was changed to ``X'' or some such. Well... guess what... the 256K cache on that die was half bad, got programmed to disabled on the chip went in a PPGA package instead of a SSEC. > Also, a rumor has been ongoing (for weeks) where, supposedly, Intel > is "fixing" the Celeron such that it will no longer operate in SMP mode. Yeppp.... and I know just how they can do it... a small mask change to add a program pad a smack off goes the APIC portion of the die... no more SMP without an APIC :-(. > These days, I'm not sure dual Celerons make sense. Unless you > overclock (which I don't recommend, for all the usual reasons), you're > only saving, oh, US$200-$230 compared to a comparable Pentium II-based > system. Also, because of the small 128K L2 cache and the 66MHz bus (no > overclocking, remember?), dual Celerons aren't as fast as dual P2s. See other posting on this... real world can;t tell between 128K L2 and 256K L2. The 66 vs 100Mhz bus can make a difference, but were doing all our Celeron stuff in PPGA370 with slot/1 adapters and running the bus at 100Mhz so we are technically overclocking the FSB, but leaving the core at normal speed, and thus didn't take that into factor when doing our tests. -- Rod Grimes - KD7CAX @ CN85sl - (RWG25) rgrimes@gndrsh.dnsmgr.net To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-smp" in the body of the message
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