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Date:      Wed, 16 Sep 2015 23:59:46 +0000 (UTC)
From:      Zbigniew Bodek <zbb@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r287884 - in head/sys/arm64: arm64 include
Message-ID:  <201509162359.t8GNxkZx066265@repo.freebsd.org>
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Author: zbb
Date: Wed Sep 16 23:59:45 2015
New Revision: 287884
URL: https://svnweb.freebsd.org/changeset/base/287884

Log:
  Block secondary ITS instances from attaching on ARM64
  
  Currently FreeBSD supports only single PIC controller. Some systems
  that have more than one (like ThunderX dual-socket) fails to boot.
  Disable other PICes until proper handling is implemented in the
  generic interrupt code.
  
  Reviewed by:   imp
  Obtained from: Semihalf
  Sponsored by:  The FreeBSD Foundation
  Differential Revision: https://reviews.freebsd.org/D3682

Modified:
  head/sys/arm64/arm64/gic_v3_its.c
  head/sys/arm64/arm64/gic_v3_var.h
  head/sys/arm64/include/cpu.h

Modified: head/sys/arm64/arm64/gic_v3_its.c
==============================================================================
--- head/sys/arm64/arm64/gic_v3_its.c	Wed Sep 16 23:46:20 2015	(r287883)
+++ head/sys/arm64/arm64/gic_v3_its.c	Wed Sep 16 23:59:45 2015	(r287884)
@@ -180,6 +180,19 @@ gic_v3_its_attach(device_t dev)
 	sc = device_get_softc(dev);
 
 	/*
+	 * XXX ARM64TODO: Avoid configuration of more than one ITS
+	 * device. To be removed when multi-PIC support is added
+	 * to FreeBSD (or at least multi-ITS is implemented). Limit
+	 * supported ITS sockets to '0' only.
+	 */
+	if (device_get_unit(dev) != 0) {
+		device_printf(dev,
+		    "Only single instance of ITS is supported, exitting...\n");
+		return (ENXIO);
+	}
+	sc->its_socket = 0;
+
+	/*
 	 * Initialize sleep & spin mutex for ITS
 	 */
 	/* Protects ITS device list and assigned LPIs bitmaps. */
@@ -558,6 +571,10 @@ its_init_cpu(struct gic_v3_its_softc *sc
 			sc = its_sc;
 		} else
 			return (ENXIO);
+
+		/* Skip if running secondary init on a wrong socket */
+		if (sc->its_socket != CPU_CURRENT_SOCKET)
+			return (ENXIO);
 	}
 
 	/*

Modified: head/sys/arm64/arm64/gic_v3_var.h
==============================================================================
--- head/sys/arm64/arm64/gic_v3_var.h	Wed Sep 16 23:46:20 2015	(r287883)
+++ head/sys/arm64/arm64/gic_v3_var.h	Wed Sep 16 23:59:45 2015	(r287884)
@@ -232,6 +232,8 @@ struct gic_v3_its_softc {
 
 	struct mtx		its_mtx;
 	struct mtx		its_spin_mtx;
+
+	uint32_t		its_socket;	/* Socket number ITS is attached to */
 };
 
 /* Stuff that is specific to the vendor's implementation */

Modified: head/sys/arm64/include/cpu.h
==============================================================================
--- head/sys/arm64/include/cpu.h	Wed Sep 16 23:46:20 2015	(r287883)
+++ head/sys/arm64/include/cpu.h	Wed Sep 16 23:59:45 2015	(r287884)
@@ -148,6 +148,8 @@ void	identify_cpu(void);
 void	swi_vm(void *v);
 
 #define	CPU_AFFINITY(cpu)	__cpu_affinity[(cpu)]
+#define	CPU_CURRENT_SOCKET				\
+    (CPU_AFF2(CPU_AFFINITY(PCPU_GET(cpuid))))
 
 static __inline uint64_t
 get_cyclecount(void)

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