From owner-freebsd-smp@FreeBSD.ORG Thu Jul 31 09:31:25 2003 Return-Path: Delivered-To: freebsd-smp@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 71F3737B433 for ; Thu, 31 Jul 2003 09:31:25 -0700 (PDT) Received: from mail.speakeasy.net (mail16.speakeasy.net [216.254.0.216]) by mx1.FreeBSD.org (Postfix) with ESMTP id 167F743FB1 for ; Thu, 31 Jul 2003 09:31:24 -0700 (PDT) (envelope-from jhb@FreeBSD.org) Received: (qmail 11196 invoked from network); 31 Jul 2003 16:31:23 -0000 Received: from unknown (HELO server.baldwin.cx) ([216.27.160.63]) (envelope-sender )encrypted SMTP for ; 31 Jul 2003 16:31:23 -0000 Received: from laptop.baldwin.cx (gw1.twc.weather.com [216.133.140.1]) by server.baldwin.cx (8.12.9/8.12.9) with ESMTP id h6VGVLGI071593; Thu, 31 Jul 2003 12:31:21 -0400 (EDT) (envelope-from jhb@FreeBSD.org) Message-ID: X-Mailer: XFMail 1.5.4 on FreeBSD X-Priority: 3 (Normal) Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit MIME-Version: 1.0 In-Reply-To: <3F28D884.FB243E9D@mindspring.com> Date: Thu, 31 Jul 2003 12:31:41 -0400 (EDT) From: John Baldwin To: Terry Lambert cc: freebsd-smp@freebsd.org cc: freebsd-questions@freebsd.org Subject: Re: PIII SMP X-BeenThere: freebsd-smp@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: FreeBSD SMP implementation group List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 31 Jul 2003 16:31:25 -0000 On 31-Jul-2003 Terry Lambert wrote: > It wasn't clear to me at the time whether the discussion was > geared toward having both APIC and xAPIC support, or only xAPIC > support. Both, the xAPIC is mostly backwards compatible. The extension of the ID field just uses bits that are reserved (and hard-wired to 0) on the older APICs. Thus, if one uses 0xFF to address all CPU's (the only real difference), then it will work on both types of APICs. > I'm not happy with my Circa 1996 dual P90 box. It's not > inconceivable that non-xAPIC processors might get deprecated > in the rush to more than 16 CPU's, like my ASUS dual P90 > box seems to have been. The P90 breakage isn't related to any APIC changes AFAICT. Do you have any more details of the exact breakage on the P90? I've forgotten the details. :( > Also, the recent change to make SSE instructions the build > default also bit me on one of my machines without SSE support. Humm, is this in the kernel? -- John Baldwin <>< http://www.FreeBSD.org/~jhb/ "Power Users Use the Power to Serve!" - http://www.FreeBSD.org/