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Date:      Mon, 31 Aug 1998 13:59:21 +1000
From:      Bruce Evans <bde@zeta.org.au>
To:        bde@zeta.org.au, cracauer@cons.org, tlambert@primenet.com
Cc:        current@FreeBSD.ORG, luoqi@watermarkgroup.com, shocking@prth.pgs.com
Subject:   Re: Floating Point Exceptions, signal handlers & subsequent ops
Message-ID:  <199808310359.NAA27283@godzilla.zeta.org.au>

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>> FP exceptions are signalled on the FP instruction following the
>> exception.  That is, you have to try to use the thing again to
>> generate an exception.
>
>Or issue 'wait' or 'fwait'. What's the difference between the two,
>BTW, my Intel docs treat them the same.

There is only a conceptual difference.  On 8086's and similar old
processors, `wait' makes the CPU wait for an external coprocessor
(which perhaps doesn't even have to be an FPU).  On 486DX's and up,
the same opcode only affects the internal FPU, so the mnemonic is
named `fwait'.

>> FreeBSD does lazy task switching; that it, FreeBSD does not do
>> FP register saves on task switches, unless necessary, and does not
>> do implict saves via TSS, since it does not use TSS for the switch
>> (ie: it doesn't go through a task gate, except to get in and out
>> of VM86 mode).

FreeBSD actually does half-baked lazy FPU context switching.  FreeBSD
does do an FPU register save on context switches (if the process that
is being switched from used the FPU).  Then the next use of the FPU
causes a trap and the FPU context of the process that caused the trap is
loaded.  Fully lazy FPU switching would defer the save until this trap.
It isn't implemented because I was concerned about saving the context
to a possibly-paged out pcb when I worked on this 6 years ago and hardly
anyone has looked at this area since then.  TSS-based context switching
doesn't affect the FPU.  I believe Linux uses TSS-based context switching
for the CPU and fully lazy context switching for the FPU.

>I don't understand how not saving the registers could lead to an FPE
>delivered to the wrong process. A process could only leave with
>pending exceptions if it used floating point and in that case its
>registers would have been saved.

Well, on old86's with a coprocessor, and on new86's with a coprocessor
but still using IRQ13 to report exceptions, the save-context FPU
instructions don't actually work if there is a trap pending - they
cause a trap in the context of the new process.  Half of the code
and most of the complications in npx.c are for ignoring this trap.
It occurs instead on the next FPU instruction for the old process,
even that instruction is a control instruction that shouldn't trap.

Bruce

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