From owner-svn-src-head@FreeBSD.ORG Thu Jun 21 22:06:58 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 19FA91065670; Thu, 21 Jun 2012 22:06:58 +0000 (UTC) (envelope-from emaste@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 058DB8FC14; Thu, 21 Jun 2012 22:06:58 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q5LM6v4R038818; Thu, 21 Jun 2012 22:06:57 GMT (envelope-from emaste@svn.freebsd.org) Received: (from emaste@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q5LM6vvK038816; Thu, 21 Jun 2012 22:06:57 GMT (envelope-from emaste@svn.freebsd.org) Message-Id: <201206212206.q5LM6vvK038816@svn.freebsd.org> From: Ed Maste Date: Thu, 21 Jun 2012 22:06:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r237411 - head/sys/dev/drm2 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 21 Jun 2012 22:06:58 -0000 Author: emaste Date: Thu Jun 21 22:06:57 2012 New Revision: 237411 URL: http://svn.freebsd.org/changeset/base/237411 Log: Add PCI IDs for Ivy Bridge Modified: head/sys/dev/drm2/drm_pciids.h Modified: head/sys/dev/drm2/drm_pciids.h ============================================================================== --- head/sys/dev/drm2/drm_pciids.h Thu Jun 21 21:47:08 2012 (r237410) +++ head/sys/dev/drm2/drm_pciids.h Thu Jun 21 22:06:57 2012 (r237411) @@ -566,6 +566,12 @@ {0x8086, 0x0116, CHIP_I9XX|CHIP_I915, "Intel SandyBridge (M)"}, \ {0x8086, 0x0126, CHIP_I9XX|CHIP_I915, "Intel SandyBridge (M)"}, \ {0x8086, 0x010A, CHIP_I9XX|CHIP_I915, "Intel SandyBridge (M)"}, \ + {0x8086, 0x0152, CHIP_I9XX|CHIP_I915, "Intel IvyBridge"}, \ + {0x8086, 0x0162, CHIP_I9XX|CHIP_I915, "Intel IvyBridge"}, \ + {0x8086, 0x0156, CHIP_I9XX|CHIP_I915, "Intel IvyBridge (M)"}, \ + {0x8086, 0x0166, CHIP_I9XX|CHIP_I915, "Intel IvyBridge (M)"}, \ + {0x8086, 0x015A, CHIP_I9XX|CHIP_I915, "Intel IvyBridge (S)"}, \ + {0x8086, 0x016A, CHIP_I9XX|CHIP_I915, "Intel IvyBridge (S)"}, \ {0x8086, 0xA001, CHIP_I9XX|CHIP_I965, "Intel Pineview"}, \ {0x8086, 0xA011, CHIP_I9XX|CHIP_I965, "Intel Pineview (M)"}, \ {0, 0, 0, NULL}