From owner-svn-src-head@FreeBSD.ORG Wed Jan 27 17:15:18 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3C3E71065672; Wed, 27 Jan 2010 17:15:18 +0000 (UTC) (envelope-from kan@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 130D78FC1D; Wed, 27 Jan 2010 17:15:18 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o0RHFHjr076925; Wed, 27 Jan 2010 17:15:17 GMT (envelope-from kan@svn.freebsd.org) Received: (from kan@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o0RHFHxv076923; Wed, 27 Jan 2010 17:15:17 GMT (envelope-from kan@svn.freebsd.org) Message-Id: <201001271715.o0RHFHxv076923@svn.freebsd.org> From: Alexander Kabaev Date: Wed, 27 Jan 2010 17:15:17 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r203080 - head/sys/mips/mips X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jan 2010 17:15:18 -0000 Author: kan Date: Wed Jan 27 17:15:17 2010 New Revision: 203080 URL: http://svn.freebsd.org/changeset/base/203080 Log: Do not leave dirty cache lines behind if bus_dmamap_sync was called to invalidate memory chunk that starts or ends in the middle of cache line. This was responsible for one half of the problem preventing umass to work reliably on some MIPS32 platforms. USBng needs to stop sharing cache lines between DMA-able memory and other structures to cure the other half. Discussed with: imp, gonzo Modified: head/sys/mips/mips/busdma_machdep.c Modified: head/sys/mips/mips/busdma_machdep.c ============================================================================== --- head/sys/mips/mips/busdma_machdep.c Wed Jan 27 17:03:40 2010 (r203079) +++ head/sys/mips/mips/busdma_machdep.c Wed Jan 27 17:15:17 2010 (r203080) @@ -1066,10 +1066,22 @@ bus_dmamap_sync_buf(void *buf, int len, memcpy ((void*)buf_cl, tmp_cl, size_cl); if (size_clend) memcpy ((void*)buf_clend, tmp_clend, size_clend); + /* + * Copies above have brought corresponding memory + * cache lines back into dirty state. Write them back + * out and invalidate affected cache lines again if + * necessary. + */ + if (size_cl) + mips_dcache_wbinv_range((vm_offset_t)buf_cl, size_cl); + if (size_clend && (size_cl == 0 || + buf_clend - buf_cl > mips_pdcache_linesize)) + mips_dcache_wbinv_range((vm_offset_t)buf_clend, + size_clend); break; case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE: - mips_dcache_wbinv_range((vm_offset_t)buf, len); + mips_dcache_wbinv_range((vm_offset_t)buf_cl, len); break; case BUS_DMASYNC_PREREAD: @@ -1088,6 +1100,18 @@ bus_dmamap_sync_buf(void *buf, int len, memcpy ((void *)buf_cl, tmp_cl, size_cl); if (size_clend) memcpy ((void *)buf_clend, tmp_clend, size_clend); + /* + * Copies above have brought corresponding memory + * cache lines back into dirty state. Write them back + * out and invalidate affected cache lines again if + * necessary. + */ + if (size_cl) + mips_dcache_wbinv_range((vm_offset_t)buf_cl, size_cl); + if (size_clend && (size_cl == 0 || + buf_clend - buf_cl > mips_pdcache_linesize)) + mips_dcache_wbinv_range((vm_offset_t)buf_clend, + size_clend); break; case BUS_DMASYNC_PREWRITE: