From owner-svn-src-all@FreeBSD.ORG Sun Aug 17 01:32:34 2014 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 6EDA1F1C; Sun, 17 Aug 2014 01:32:34 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 406E3247D; Sun, 17 Aug 2014 01:32:34 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s7H1WYaQ085362; Sun, 17 Aug 2014 01:32:34 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s7H1WXUn085360; Sun, 17 Aug 2014 01:32:33 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201408170132.s7H1WXUn085360@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Sun, 17 Aug 2014 01:32:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r270076 - stable/10/sys/arm/freescale/imx X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 17 Aug 2014 01:32:34 -0000 Author: ian Date: Sun Aug 17 01:32:33 2014 New Revision: 270076 URL: http://svnweb.freebsd.org/changeset/base/270076 Log: MFC r269607, r269698: Cache the imx6 SoC type in a static var so that it only has to be figured out by sniffing hardware registers once. Add a missing clock register definition. Modified: stable/10/sys/arm/freescale/imx/imx6_ccmreg.h stable/10/sys/arm/freescale/imx/imx6_machdep.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/freescale/imx/imx6_ccmreg.h ============================================================================== --- stable/10/sys/arm/freescale/imx/imx6_ccmreg.h Sun Aug 17 01:28:03 2014 (r270075) +++ stable/10/sys/arm/freescale/imx/imx6_ccmreg.h Sun Aug 17 01:32:33 2014 (r270076) @@ -36,6 +36,7 @@ #define CCM_CLPCR_LPM_STOP 0x02 #define CCM_CGPR 0x064 #define CCM_CGPR_INT_MEM_CLK_LPM (1 << 17) +#define CCM_CCGR0 0x068 #define CCM_CCGR1 0x06C #define CCM_CCGR2 0x070 #define CCM_CCGR3 0x074 Modified: stable/10/sys/arm/freescale/imx/imx6_machdep.c ============================================================================== --- stable/10/sys/arm/freescale/imx/imx6_machdep.c Sun Aug 17 01:28:03 2014 (r270075) +++ stable/10/sys/arm/freescale/imx/imx6_machdep.c Sun Aug 17 01:32:33 2014 (r270076) @@ -145,12 +145,16 @@ u_int imx_soc_type() { uint32_t digprog, hwsoc; uint32_t *pcr; + static u_int soctype; const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004; #define HWSOC_MX6SL 0x60 #define HWSOC_MX6DL 0x61 #define HWSOC_MX6SOLO 0x62 #define HWSOC_MX6Q 0x63 + if (soctype != 0) + return (soctype); + digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL); hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK; @@ -174,20 +178,25 @@ u_int imx_soc_type() switch (hwsoc) { case HWSOC_MX6SL: - return (IMXSOC_6SL); + soctype = IMXSOC_6SL; + break; case HWSOC_MX6SOLO: - return (IMXSOC_6S); + soctype = IMXSOC_6S; + break; case HWSOC_MX6DL: - return (IMXSOC_6DL); + soctype = IMXSOC_6DL; + break; case HWSOC_MX6Q : - return (IMXSOC_6Q); + soctype = IMXSOC_6Q; + break; default: printf("imx_soc_type: Don't understand hwsoc 0x%02x, " "digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog); + soctype = IMXSOC_6Q; break; } - return (IMXSOC_6Q); + return (soctype); } /*