Date: Tue, 10 Mar 2009 10:25:51 GMT From: Ulf Lilleengen <lulf@FreeBSD.org> To: Perforce Change Reviews <perforce@FreeBSD.org> Subject: PERFORCE change 158984 for review Message-ID: <200903101025.n2AAPpT0085449@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=158984 Change 158984 by lulf@lulf_carrot on 2009/03/10 10:25:31 - Add macros for the rest of the possible cache operations. - Change writeback to clean, to follow the techref manual. - Support flushing data and instruction cache, and perform this operation on initialization. Affected files ... .. //depot/projects/avr32/src/sys/avr32/avr32/cache.c#4 edit .. //depot/projects/avr32/src/sys/avr32/avr32/machdep.c#11 edit Differences ... ==== //depot/projects/avr32/src/sys/avr32/avr32/cache.c#4 (text+ko) ==== @@ -41,23 +41,46 @@ #include <machine/reg_usart.h> #include <machine/at32ap700x.h> -/* Valid cache op codes. */ +/* Valid instruction cache op codes. */ +#define ICACHE_FLUSH 0x00 #define ICACHE_INVALIDATE 0x01 +#define ICACHE_LOCK 0x02 +#define ICACHE_UNLOCK 0x03 +#define ICACHE_PREFETCH 0x04 + +/* Flush modes. */ +#define ICACHE_FLUSH_ALL 0 +#define ICACHE_FLUSH_UNLOCKED 1 +#define ICACHE_FLUSH_UNLOCK 2 + +/* Valid data cache op codes. */ +#define DCACHE_FLUSH 0x08 +#define DCACHE_LOCK 0x09 +#define DCACHE_UNLOCK 0x0a #define DCACHE_INVALIDATE 0x0b -#define DCACHE_WRITEBACK 0x0c -#define DCACHE_WRITEBACK_INVALIDATE 0x0d +#define DCACHE_CLEAN 0x0c +#define DCACHE_CLEAN_INVALIDATE 0x0d + +/* Flush modes. */ +#define DCACHE_FLUSH_INVALIDATE_ALL 0 +#define DCACHE_FLUSH_INVALIDATE_UNLOCKED 1 +#define DCACHE_FLUSH_CLEAN_ALL 2 +#define DCACHE_FLUSH_CLEAN_UNLOCKED 3 +#define DCACHE_FLUSH_CLEAN_INVALIDATE_ALL 4 +#define DCACHE_FLUSH_CLEAN_INVALIDATE_UNLOCKED 5 +#define DCACHE_FLUSH_UNLOCK_ALL 6 /* Next line boundary. */ #define round_line(va, size) (((va) + ((size) - 1)) & ~((size) - 1)) /* Previous line boundary. */ #define trunc_line(va, size) ((va) & ~((size) - 1)) -/* Perform operation on cache line. */ -#define cache_line_op(va, op) \ +/* Perform operation a cache. */ +#define cache_op(arg, op) \ __asm__ __volatile( \ "cache %0[0], %1" \ : \ - : "r" (va), "n" (op) \ + : "r" (arg), "n" (op) \ : "memory") struct avr32_cache_ops avr32_cache_ops; @@ -176,7 +199,7 @@ void avr32_l1icache_sync_all(void) { - avr32_impl(); + cache_op(ICACHE_FLUSH_ALL, ICACHE_FLUSH); } void @@ -194,7 +217,7 @@ void avr32_l1dcache_wbinv_all(void) { - avr32_impl(); + cache_op(DCACHE_FLUSH_CLEAN_INVALIDATE_ALL, DCACHE_FLUSH); } void @@ -212,7 +235,7 @@ va = trunc_line(from, avr32_dcache_line_size); va_end = round_line(from + size, avr32_dcache_line_size); while (va < va_end) { - cache_line_op(va, DCACHE_WRITEBACK_INVALIDATE); + cache_op(va, DCACHE_CLEAN_INVALIDATE); va += avr32_dcache_line_size; } } @@ -227,7 +250,7 @@ va = trunc_line(from, avr32_dcache_line_size); va_end = round_line(from + size, avr32_dcache_line_size); while (va < va_end) { - cache_line_op(va, DCACHE_INVALIDATE); + cache_op(va, DCACHE_INVALIDATE); va += avr32_dcache_line_size; } } @@ -242,7 +265,7 @@ va_end = round_line(from + size, avr32_dcache_line_size); while (va < va_end) { - cache_line_op(va, DCACHE_WRITEBACK); + cache_op(va, DCACHE_CLEAN); va += avr32_dcache_line_size; } avr32_wbflush(); ==== //depot/projects/avr32/src/sys/avr32/avr32/machdep.c#11 (text+ko) ==== @@ -186,6 +186,8 @@ /* Set up cache handling. */ avr32_config_cache(); + avr32_icache_sync_all(); + avr32_dcache_wbinv_all(); /* * Set up buffers, so they can be used to read disk labels.
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