From owner-svn-src-head@freebsd.org Wed Jun 28 20:28:48 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 4DE1ADA9568; Wed, 28 Jun 2017 20:28:48 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 19315153B; Wed, 28 Jun 2017 20:28:48 +0000 (UTC) (envelope-from ian@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v5SKSli8095565; Wed, 28 Jun 2017 20:28:47 GMT (envelope-from ian@FreeBSD.org) Received: (from ian@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v5SKSl6p095564; Wed, 28 Jun 2017 20:28:47 GMT (envelope-from ian@FreeBSD.org) Message-Id: <201706282028.v5SKSl6p095564@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: ian set sender to ian@FreeBSD.org using -f From: Ian Lepore Date: Wed, 28 Jun 2017 20:28:47 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r320456 - head/sys/arm/freescale/imx X-SVN-Group: head X-SVN-Commit-Author: ian X-SVN-Commit-Paths: head/sys/arm/freescale/imx X-SVN-Commit-Revision: 320456 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 28 Jun 2017 20:28:48 -0000 Author: ian Date: Wed Jun 28 20:28:47 2017 New Revision: 320456 URL: https://svnweb.freebsd.org/changeset/base/320456 Log: Implement gpio input by reading the pad state register, not the data register. When a pin is set for input the value in the DR will be the same as the PSR. When a pin is set for output the value in the DR is the value output to the pad, and the value in the PSR is the actual electrical level sensed on the pad, and they can be different if the pad is configured for open-drain mode and some other entity on the board is driving the line low. Modified: head/sys/arm/freescale/imx/imx_gpio.c Modified: head/sys/arm/freescale/imx/imx_gpio.c ============================================================================== --- head/sys/arm/freescale/imx/imx_gpio.c Wed Jun 28 19:08:07 2017 (r320455) +++ head/sys/arm/freescale/imx/imx_gpio.c Wed Jun 28 20:28:47 2017 (r320456) @@ -644,7 +644,7 @@ imx51_gpio_pin_get(device_t dev, uint32_t pin, unsigne if (pin >= sc->gpio_npins) return (EINVAL); - *val = (READ4(sc, IMX_GPIO_DR_REG) >> pin) & 1; + *val = (READ4(sc, IMX_GPIO_PSR_REG) >> pin) & 1; return (0); }