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Date:      Wed, 22 Jun 2011 21:04:14 +0000 (UTC)
From:      John Baldwin <jhb@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r223440 - in head/sys: amd64/include amd64/pci conf i386/include i386/pci x86/include x86/pci
Message-ID:  <201106222104.p5ML4Ef7068567@svn.freebsd.org>

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Author: jhb
Date: Wed Jun 22 21:04:13 2011
New Revision: 223440
URL: http://svn.freebsd.org/changeset/base/223440

Log:
  Move {amd64,i386}/pci/pci_bus.c and {amd64,i386}/include/pci_cfgreg.h to
  the x86 tree.  The $PIR code is still only enabled on i386 and not amd64.
  While here, make the qpi(4) driver on conditional on 'device pci'.

Added:
  head/sys/x86/include/pci_cfgreg.h
     - copied, changed from r223433, head/sys/i386/include/pci_cfgreg.h
  head/sys/x86/pci/pci_bus.c
     - copied, changed from r223428, head/sys/i386/pci/pci_bus.c
Deleted:
  head/sys/amd64/pci/pci_bus.c
  head/sys/i386/pci/pci_bus.c
Modified:
  head/sys/amd64/include/pci_cfgreg.h
  head/sys/conf/files.amd64
  head/sys/conf/files.i386
  head/sys/conf/files.pc98
  head/sys/i386/include/param.h
  head/sys/i386/include/pci_cfgreg.h

Modified: head/sys/amd64/include/pci_cfgreg.h
==============================================================================
--- head/sys/amd64/include/pci_cfgreg.h	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/amd64/include/pci_cfgreg.h	Wed Jun 22 21:04:13 2011	(r223440)
@@ -1,44 +1,6 @@
 /*-
- * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
+ * This file is in the public domain.
  */
+/* $FreeBSD$ */
 
-#define CONF1_ADDR_PORT    0x0cf8
-#define CONF1_DATA_PORT    0x0cfc
-
-#define CONF1_ENABLE       0x80000000ul
-#define CONF1_ENABLE_CHK   0x80000000ul
-#define CONF1_ENABLE_MSK   0x7f000000ul
-#define CONF1_ENABLE_CHK1  0xff000001ul
-#define CONF1_ENABLE_MSK1  0x80000001ul
-#define CONF1_ENABLE_RES1  0x80000000ul
-
-u_long		hostb_alloc_start(int type, u_long start, u_long end, u_long count);
-int		pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus);
-int		pci_cfgregopen(void);
-u_int32_t	pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
-void		pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
+#include <x86/pci_cfgreg.h>

Modified: head/sys/conf/files.amd64
==============================================================================
--- head/sys/conf/files.amd64	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/conf/files.amd64	Wed Jun 22 21:04:13 2011	(r223440)
@@ -128,7 +128,6 @@ amd64/amd64/trap.c		standard
 amd64/amd64/uio_machdep.c	standard
 amd64/amd64/uma_machdep.c	standard
 amd64/amd64/vm_machdep.c	standard
-amd64/pci/pci_bus.c		optional	pci
 amd64/pci/pci_cfgreg.c		optional	pci
 crypto/aesni/aesencdec_amd64.S	optional aesni
 crypto/aesni/aeskeys_amd64.S	optional aesni
@@ -315,7 +314,8 @@ x86/isa/isa.c			standard
 x86/isa/isa_dma.c		standard
 x86/isa/nmi.c			standard
 x86/isa/orm.c			optional	isa
-x86/pci/qpi.c			standard
+x86/pci/pci_bus.c		optional	pci
+x86/pci/qpi.c			optional	pci
 x86/x86/busdma_machdep.c	standard
 x86/x86/dump_machdep.c		standard
 x86/x86/io_apic.c		standard

Modified: head/sys/conf/files.i386
==============================================================================
--- head/sys/conf/files.i386	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/conf/files.i386	Wed Jun 22 21:04:13 2011	(r223440)
@@ -352,7 +352,6 @@ i386/linux/linux_support.s	optional comp
 	dependency 	"linux_assym.h"
 i386/linux/linux_sysent.c	optional compat_linux
 i386/linux/linux_sysvec.c	optional compat_linux
-i386/pci/pci_bus.c		optional pci
 i386/pci/pci_cfgreg.c		optional pci
 i386/pci/pci_pir.c		optional pci 
 i386/svr4/svr4_locore.s		optional compat_svr4	\
@@ -405,7 +404,8 @@ x86/isa/isa.c			optional isa
 x86/isa/isa_dma.c		optional isa
 x86/isa/nmi.c			standard
 x86/isa/orm.c			optional isa
-x86/pci/qpi.c			standard
+x86/pci/pci_bus.c		optional pci
+x86/pci/qpi.c			optional pci
 x86/x86/busdma_machdep.c	standard
 x86/x86/dump_machdep.c		standard
 x86/x86/io_apic.c		optional apic

Modified: head/sys/conf/files.pc98
==============================================================================
--- head/sys/conf/files.pc98	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/conf/files.pc98	Wed Jun 22 21:04:13 2011	(r223440)
@@ -199,7 +199,6 @@ i386/linux/linux_support.s	optional comp
 	dependency 	"linux_assym.h"
 i386/linux/linux_sysent.c	optional compat_linux
 i386/linux/linux_sysvec.c	optional compat_linux
-i386/pci/pci_bus.c		optional pci
 i386/pci/pci_cfgreg.c		optional pci
 i386/pci/pci_pir.c		optional pci
 i386/svr4/svr4_locore.s		optional compat_svr4	\
@@ -249,6 +248,7 @@ pc98/pc98/pc98_machdep.c	standard
 x86/isa/atpic.c			optional atpic	
 x86/isa/clock.c			standard
 x86/isa/isa.c			optional isa
+x86/pci/pci_bus.c		optional pci
 x86/x86/busdma_machdep.c	standard
 x86/x86/dump_machdep.c		standard
 x86/x86/io_apic.c		optional apic

Modified: head/sys/i386/include/param.h
==============================================================================
--- head/sys/i386/include/param.h	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/i386/include/param.h	Wed Jun 22 21:04:13 2011	(r223440)
@@ -56,6 +56,7 @@
 
 
 #define __HAVE_ACPI
+#define	__HAVE_PIR
 #define __PCI_REROUTE_INTERRUPT
 
 #ifndef MACHINE

Modified: head/sys/i386/include/pci_cfgreg.h
==============================================================================
--- head/sys/i386/include/pci_cfgreg.h	Wed Jun 22 20:20:49 2011	(r223439)
+++ head/sys/i386/include/pci_cfgreg.h	Wed Jun 22 21:04:13 2011	(r223440)
@@ -1,53 +1,6 @@
 /*-
- * Copyright (c) 1997, Stefan Esser <se@freebsd.org>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice unmodified, this list of conditions, and the following
- *    disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *
- * $FreeBSD$
- *
+ * This file is in the public domain.
  */
+/* $FreeBSD$ */
 
-#define CONF1_ADDR_PORT    0x0cf8
-#define CONF1_DATA_PORT    0x0cfc
-
-#define CONF1_ENABLE       0x80000000ul
-#define CONF1_ENABLE_CHK   0x80000000ul
-#define CONF1_ENABLE_MSK   0x7f000000ul
-#define CONF1_ENABLE_CHK1  0xff000001ul
-#define CONF1_ENABLE_MSK1  0x80000001ul
-#define CONF1_ENABLE_RES1  0x80000000ul
-
-#define CONF2_ENABLE_PORT  0x0cf8
-#define CONF2_FORWARD_PORT 0x0cfa
-
-#define CONF2_ENABLE_CHK   0x0e
-#define CONF2_ENABLE_RES   0x0e
-
-u_long		hostb_alloc_start(int type, u_long start, u_long end, u_long count);
-int		pcie_cfgregopen(uint64_t base, uint8_t minbus, uint8_t maxbus);
-int		pci_cfgregopen(void);
-u_int32_t	pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
-void		pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
-void		pci_pir_open(void);
-int		pci_pir_probe(int bus, int require_parse);
-int		pci_pir_route_interrupt(int bus, int device, int func, int pin);
+#include <x86/pci_cfgreg.h>

Copied and modified: head/sys/x86/include/pci_cfgreg.h (from r223433, head/sys/i386/include/pci_cfgreg.h)
==============================================================================
--- head/sys/i386/include/pci_cfgreg.h	Wed Jun 22 18:48:07 2011	(r223433, copy source)
+++ head/sys/x86/include/pci_cfgreg.h	Wed Jun 22 21:04:13 2011	(r223440)
@@ -27,6 +27,9 @@
  *
  */
 
+#ifndef __X86_PCI_CFGREG_H__
+#define	__X86_PCI_CFGREG_H__
+
 #define CONF1_ADDR_PORT    0x0cf8
 #define CONF1_DATA_PORT    0x0cfc
 
@@ -48,6 +51,10 @@ int		pcie_cfgregopen(uint64_t base, uint
 int		pci_cfgregopen(void);
 u_int32_t	pci_cfgregread(int bus, int slot, int func, int reg, int bytes);
 void		pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes);
+#ifdef __HAVE_PIR
 void		pci_pir_open(void);
 int		pci_pir_probe(int bus, int require_parse);
 int		pci_pir_route_interrupt(int bus, int device, int func, int pin);
+#endif
+
+#endif /* !__X86_PCI_CFGREG_H__ */

Copied and modified: head/sys/x86/pci/pci_bus.c (from r223428, head/sys/i386/pci/pci_bus.c)
==============================================================================
--- head/sys/i386/pci/pci_bus.c	Wed Jun 22 17:55:16 2011	(r223428, copy source)
+++ head/sys/x86/pci/pci_bus.c	Wed Jun 22 21:04:13 2011	(r223440)
@@ -51,9 +51,6 @@ __FBSDID("$FreeBSD$");
 
 #include "pcib_if.h"
 
-static int	pcibios_pcib_route_interrupt(device_t pcib, device_t dev,
-    int pin);
-
 int
 legacy_pcib_maxslots(device_t dev)
 {
@@ -78,6 +75,21 @@ legacy_pcib_write_config(device_t dev, u
 	pci_cfgregwrite(bus, slot, func, reg, data, bytes);
 }
 
+/* route interrupt */
+
+static int
+legacy_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
+{
+
+#ifdef __HAVE_PIR
+	return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
+	    pci_get_function(dev), pin));
+#else
+	/* No routing possible */
+	return (PCI_INVALID_IRQ);
+#endif
+}
+
 /* Pass MSI requests up to the nexus. */
 
 static int
@@ -115,6 +127,7 @@ legacy_pcib_is_host_bridge(int bus, int 
 			  uint32_t id, uint8_t class, uint8_t subclass,
 			  uint8_t *busnum)
 {
+#ifdef __i386__
 	const char *s = NULL;
 	static uint8_t pxb[4];	/* hack for 450nx */
 
@@ -332,6 +345,14 @@ legacy_pcib_is_host_bridge(int bus, int 
 	}
 
 	return s;
+#else
+	const char *s = NULL;
+
+	*busnum = 0;
+	if (class == PCIC_BRIDGE && subclass == PCIS_BRIDGE_HOST)
+		s = "Host to PCI bridge";
+	return s;
+#endif
 }
 
 /*
@@ -471,19 +492,23 @@ legacy_pcib_probe(device_t dev)
 static int
 legacy_pcib_attach(device_t dev)
 {
+#ifdef __HAVE_PIR
 	device_t pir;
+#endif
 	int bus;
 
+	bus = pcib_get_bus(dev);
+#ifdef __HAVE_PIR
 	/*
 	 * Look for a PCI BIOS interrupt routing table as that will be
 	 * our method of routing interrupts if we have one.
 	 */
-	bus = pcib_get_bus(dev);
 	if (pci_pir_probe(bus, 0)) {
 		pir = BUS_ADD_CHILD(device_get_parent(dev), 0, "pir", 0);
 		if (pir != NULL)
 			device_probe_and_attach(pir);
 	}
+#endif
 	device_add_child(dev, "pci", bus);
 	return bus_generic_attach(dev);
 }
@@ -587,7 +612,7 @@ static device_method_t legacy_pcib_metho
 	DEVMETHOD(pcib_maxslots,	legacy_pcib_maxslots),
 	DEVMETHOD(pcib_read_config,	legacy_pcib_read_config),
 	DEVMETHOD(pcib_write_config,	legacy_pcib_write_config),
-	DEVMETHOD(pcib_route_interrupt,	pcibios_pcib_route_interrupt),
+	DEVMETHOD(pcib_route_interrupt,	legacy_pcib_route_interrupt),
 	DEVMETHOD(pcib_alloc_msi,	legacy_pcib_alloc_msi),
 	DEVMETHOD(pcib_release_msi,	pcib_release_msi),
 	DEVMETHOD(pcib_alloc_msix,	legacy_pcib_alloc_msix),
@@ -651,7 +676,7 @@ static devclass_t pcibus_pnp_devclass;
 DEFINE_CLASS_0(pcibus_pnp, pcibus_pnp_driver, pcibus_pnp_methods, 1);
 DRIVER_MODULE(pcibus_pnp, isa, pcibus_pnp_driver, pcibus_pnp_devclass, 0, 0);
 
-
+#ifdef __HAVE_PIR
 /*
  * Provide a PCI-PCI bridge driver for PCI busses behind PCI-PCI bridges
  * that appear in the PCIBIOS Interrupt Routing Table to use the routing
@@ -664,7 +689,7 @@ static device_method_t pcibios_pcib_pci_
 	DEVMETHOD(device_probe,		pcibios_pcib_probe),
 
 	/* pcib interface */
-	DEVMETHOD(pcib_route_interrupt,	pcibios_pcib_route_interrupt),
+	DEVMETHOD(pcib_route_interrupt,	legacy_pcib_route_interrupt),
 
 	{0, 0}
 };
@@ -691,10 +716,4 @@ pcibios_pcib_probe(device_t dev)
 	device_set_desc(dev, "PCIBIOS PCI-PCI bridge");
 	return (-2000);
 }
-
-static int
-pcibios_pcib_route_interrupt(device_t pcib, device_t dev, int pin)
-{
-	return (pci_pir_route_interrupt(pci_get_bus(dev), pci_get_slot(dev),
-		pci_get_function(dev), pin));
-}
+#endif



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