From owner-svn-src-head@FreeBSD.ORG Sat Feb 4 23:25:19 2012 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 73F18106566B; Sat, 4 Feb 2012 23:25:19 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 545528FC15; Sat, 4 Feb 2012 23:25:19 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id q14NPJmN056447; Sat, 4 Feb 2012 23:25:19 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id q14NPJ7L056445; Sat, 4 Feb 2012 23:25:19 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201202042325.q14NPJ7L056445@svn.freebsd.org> From: Nathan Whitehorn Date: Sat, 4 Feb 2012 23:25:19 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r230999 - head/sys/powerpc/powermac X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Feb 2012 23:25:19 -0000 Author: nwhitehorn Date: Sat Feb 4 23:25:18 2012 New Revision: 230999 URL: http://svn.freebsd.org/changeset/base/230999 Log: Compatibility with IBM firmware. Modified: head/sys/powerpc/powermac/cpcht.c Modified: head/sys/powerpc/powermac/cpcht.c ============================================================================== --- head/sys/powerpc/powermac/cpcht.c Sat Feb 4 23:12:14 2012 (r230998) +++ head/sys/powerpc/powermac/cpcht.c Sat Feb 4 23:25:18 2012 (r230999) @@ -178,7 +178,8 @@ cpcht_attach(device_t dev) if (OF_getprop(node, "reg", reg, sizeof(reg)) < 12) return (ENXIO); - sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN; + if (OF_getproplen(node, "ranges") <= 0) + sc->pci_sc.sc_quirks = OFW_PCI_QUIRK_RANGES_ON_CHILDREN; sc->sc_populated_slots = 0; sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1], reg[2]); @@ -214,12 +215,13 @@ cpcht_configure_htbridge(device_t dev, p int ptr, nextptr; uint32_t vend, val; int i, nirq, irq; - u_int f, s; + u_int b, f, s; sc = device_get_softc(dev); if (OF_getprop(child, "reg", &pcir, sizeof(pcir)) == -1) return; + b = OFW_PCI_PHYS_HI_BUS(pcir.phys_hi); s = OFW_PCI_PHYS_HI_DEVICE(pcir.phys_hi); f = OFW_PCI_PHYS_HI_FUNCTION(pcir.phys_hi); @@ -242,41 +244,41 @@ cpcht_configure_htbridge(device_t dev, p */ /* All the devices we are interested in have caps */ - if (!(PCIB_READ_CONFIG(dev, 0, s, f, PCIR_STATUS, 2) + if (!(PCIB_READ_CONFIG(dev, b, s, f, PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT)) return; - nextptr = PCIB_READ_CONFIG(dev, 0, s, f, PCIR_CAP_PTR, 1); + nextptr = PCIB_READ_CONFIG(dev, b, s, f, PCIR_CAP_PTR, 1); while (nextptr != 0) { ptr = nextptr; - nextptr = PCIB_READ_CONFIG(dev, 0, s, f, + nextptr = PCIB_READ_CONFIG(dev, b, s, f, ptr + PCICAP_NEXTPTR, 1); /* Find the HT IRQ capabilities */ - if (PCIB_READ_CONFIG(dev, 0, s, f, + if (PCIB_READ_CONFIG(dev, b, s, f, ptr + PCICAP_ID, 1) != PCIY_HT) continue; - val = PCIB_READ_CONFIG(dev, 0, s, f, ptr + PCIR_HT_COMMAND, 2); + val = PCIB_READ_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 2); if ((val & PCIM_HTCMD_CAP_MASK) != PCIM_HTCAP_INTERRUPT) continue; /* Ask for the IRQ count */ - PCIB_WRITE_CONFIG(dev, 0, s, f, ptr + PCIR_HT_COMMAND, 0x1, 1); - nirq = PCIB_READ_CONFIG(dev, 0, s, f, ptr + 4, 4); + PCIB_WRITE_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 0x1, 1); + nirq = PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4); nirq = ((nirq >> 16) & 0xff) + 1; device_printf(dev, "%d HT IRQs on device %d.%d\n", nirq, s, f); for (i = 0; i < nirq; i++) { - PCIB_WRITE_CONFIG(dev, 0, s, f, + PCIB_WRITE_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 0x10 + (i << 1), 1); - irq = PCIB_READ_CONFIG(dev, 0, s, f, ptr + 4, 4); + irq = PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4); /* * Mask this interrupt for now. */ - PCIB_WRITE_CONFIG(dev, 0, s, f, ptr + 4, + PCIB_WRITE_CONFIG(dev, b, s, f, ptr + 4, irq | HTAPIC_MASK, 4); irq = (irq >> 16) & 0xff; @@ -285,10 +287,10 @@ cpcht_configure_htbridge(device_t dev, p sc->htirq_map[irq].ht_base = sc->sc_data + (((((s & 0x1f) << 3) | (f & 0x07)) << 8) | (ptr)); - PCIB_WRITE_CONFIG(dev, 0, s, f, + PCIB_WRITE_CONFIG(dev, b, s, f, ptr + PCIR_HT_COMMAND, 0x11 + (i << 1), 1); sc->htirq_map[irq].eoi_data = - PCIB_READ_CONFIG(dev, 0, s, f, ptr + 4, 4) | + PCIB_READ_CONFIG(dev, b, s, f, ptr + 4, 4) | 0x80000000; /* @@ -296,7 +298,7 @@ cpcht_configure_htbridge(device_t dev, p * in how we signal EOIs. Check if this device was * made by Apple, and act accordingly. */ - vend = PCIB_READ_CONFIG(dev, 0, s, f, + vend = PCIB_READ_CONFIG(dev, b, s, f, PCIR_DEVVENDOR, 4); if ((vend & 0xffff) == 0x106b) sc->htirq_map[irq].apple_eoi =