Date: Sat, 17 May 2014 17:54:38 +0000 (UTC) From: Ian Lepore <ian@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r266332 - in stable/10/sys: arm/arm arm/conf arm/samsung/exynos boot/fdt/dts/arm Message-ID: <201405171754.s4HHscdm076669@svn.freebsd.org>
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Author: ian Date: Sat May 17 17:54:38 2014 New Revision: 266332 URL: http://svnweb.freebsd.org/changeset/base/266332 Log: MFC 263250, 263251, 263424, 263425, 263426, 263427, 263430, 263431 Use the same cache terminology as the ARM docs in comments. No functional changes. Use armv7 TLB flush code, not arm11, for cortex-a processors. Exynos/ Arndale... - Disable debugging by default. - Add display-related and clk devices to the tree - Prevent resources intersection with EHCI driver - Add display-related and clk devices to the tree - Prevent resources intersection with EHCI driver - Add driver for Display Controller. - Add support for Samsung Chromebook (ARM Cortex A15 machine). - Rename mct and ehci drivers files to match common naming. Added: stable/10/sys/arm/conf/CHROMEBOOK - copied unchanged from r263427, head/sys/arm/conf/CHROMEBOOK stable/10/sys/arm/samsung/exynos/exynos5_common.h - copied unchanged from r263426, head/sys/arm/samsung/exynos/exynos5_common.h stable/10/sys/arm/samsung/exynos/exynos5_ehci.c - copied unchanged from r263431, head/sys/arm/samsung/exynos/exynos5_ehci.c stable/10/sys/arm/samsung/exynos/exynos5_fimd.c - copied, changed from r263426, head/sys/arm/samsung/exynos/exynos5_fimd.c stable/10/sys/arm/samsung/exynos/exynos5_mct.c - copied unchanged from r263431, head/sys/arm/samsung/exynos/exynos5_mct.c stable/10/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts - copied unchanged from r263427, head/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts Deleted: stable/10/sys/arm/samsung/exynos/arch_timer.c stable/10/sys/arm/samsung/exynos/ehci_exynos5.c Modified: stable/10/sys/arm/arm/cpufunc.c stable/10/sys/arm/arm/cpufunc_asm_armv7.S stable/10/sys/arm/conf/ARNDALE stable/10/sys/arm/samsung/exynos/files.exynos5 stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/arm/arm/cpufunc.c ============================================================================== --- stable/10/sys/arm/arm/cpufunc.c Sat May 17 17:34:37 2014 (r266331) +++ stable/10/sys/arm/arm/cpufunc.c Sat May 17 17:54:38 2014 (r266332) @@ -754,14 +754,18 @@ struct cpu_functions cortexa_cpufuncs = cpufunc_faultstatus, /* Faultstatus */ cpufunc_faultaddress, /* Faultaddress */ - /* TLB functions */ + /* + * TLB functions. ARMv7 does all TLB ops based on a unified TLB model + * whether the hardware implements separate I+D or not, so we use the + * same 'ID' functions for all 3 variations. + */ armv7_tlb_flushID, /* tlb_flushID */ armv7_tlb_flushID_SE, /* tlb_flushID_SE */ - arm11_tlb_flushI, /* tlb_flushI */ - arm11_tlb_flushI_SE, /* tlb_flushI_SE */ - arm11_tlb_flushD, /* tlb_flushD */ - arm11_tlb_flushD_SE, /* tlb_flushD_SE */ + armv7_tlb_flushID, /* tlb_flushI */ + armv7_tlb_flushID_SE, /* tlb_flushI_SE */ + armv7_tlb_flushID, /* tlb_flushD */ + armv7_tlb_flushID_SE, /* tlb_flushD_SE */ /* Cache operations */ Modified: stable/10/sys/arm/arm/cpufunc_asm_armv7.S ============================================================================== --- stable/10/sys/arm/arm/cpufunc_asm_armv7.S Sat May 17 17:34:37 2014 (r266331) +++ stable/10/sys/arm/arm/cpufunc_asm_armv7.S Sat May 17 17:54:38 2014 (r266332) @@ -84,10 +84,10 @@ END(armv7_setttb) ENTRY(armv7_tlb_flushID) dsb #ifdef SMP - mcr p15, 0, r0, c8, c3, 0 /* flush I+D tlb */ - mcr p15, 0, r0, c7, c1, 6 /* flush BTB */ + mcr p15, 0, r0, c8, c3, 0 /* flush Unified TLB all entries Inner Shareable */ + mcr p15, 0, r0, c7, c1, 6 /* flush BTB Inner Shareable */ #else - mcr p15, 0, r0, c8, c7, 0 /* flush I+D tlb */ + mcr p15, 0, r0, c8, c7, 0 /* flush Unified TLB all entries */ mcr p15, 0, r0, c7, c5, 6 /* flush BTB */ #endif dsb @@ -99,10 +99,10 @@ ENTRY(armv7_tlb_flushID_SE) ldr r1, .Lpage_mask bic r0, r0, r1 #ifdef SMP - mcr p15, 0, r0, c8, c3, 3 /* flush D tlb single entry Inner Shareable*/ + mcr p15, 0, r0, c8, c3, 3 /* flush Unified TLB single entry Inner Shareable */ mcr p15, 0, r0, c7, c1, 6 /* flush BTB Inner Shareable */ #else - mcr p15, 0, r0, c8, c7, 1 /* flush D tlb single entry */ + mcr p15, 0, r0, c8, c7, 1 /* flush Unified TLB single entry */ mcr p15, 0, r0, c7, c5, 6 /* flush BTB */ #endif dsb Modified: stable/10/sys/arm/conf/ARNDALE ============================================================================== --- stable/10/sys/arm/conf/ARNDALE Sat May 17 17:34:37 2014 (r266331) +++ stable/10/sys/arm/conf/ARNDALE Sat May 17 17:54:38 2014 (r266332) @@ -60,11 +60,11 @@ options BREAK_TO_DEBUGGER #options VERBOSE_SYSINIT # Enable verbose sysinit messages options KDB options DDB # Enable the kernel debugger -options INVARIANTS # Enable calls of extra sanity checking -options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS #options WITNESS # Enable checks to detect deadlocks and cycles #options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed -options DIAGNOSTIC +#options DIAGNOSTIC # NFS support options NFSCL # Network Filesystem Client Copied: stable/10/sys/arm/conf/CHROMEBOOK (from r263427, head/sys/arm/conf/CHROMEBOOK) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/arm/conf/CHROMEBOOK Sat May 17 17:54:38 2014 (r266332, copy of r263427, head/sys/arm/conf/CHROMEBOOK) @@ -0,0 +1,146 @@ +# Kernel configuration for Samsung Chromebook (Exynos5 Dual machine). +# +# For more information on this file, please read the config(5) manual page, +# and/or the handbook section on Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD$ + +ident CHROMEBOOK + +include "../samsung/exynos/std.exynos5" + +makeoptions MODULES_OVERRIDE="" +makeoptions WITHOUT_MODULES="ahc" + +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +makeoptions WERROR="-Werror" + +options HZ=100 +options SCHED_4BSD # 4BSD scheduler +options INET # InterNETworking +options INET6 # IPv6 communications protocols +options GEOM_PART_BSD # BSD partition scheme +options GEOM_PART_MBR # MBR partition scheme +options TMPFS # Efficient memory filesystem +options FFS # Berkeley Fast Filesystem +options SOFTUPDATES +options UFS_ACL # Support for access control lists +options UFS_DIRHASH # Improve performance on big directories +options MSDOSFS # MSDOS Filesystem +options CD9660 # ISO 9660 Filesystem +options PROCFS # Process filesystem (requires PSEUDOFS) +options PSEUDOFS # Pseudo-filesystem framework +options COMPAT_43 # Compatible with BSD 4.3 [KEEP THIS!] +options SCSI_DELAY=5000 # Delay (in ms) before probing SCSI +options KTRACE +options SYSVSHM # SYSV-style shared memory +options SYSVMSG # SYSV-style message queues +options SYSVSEM # SYSV-style semaphores +options _KPOSIX_PRIORITY_SCHEDULING # Posix P1003_1B real-time extensions +options KBD_INSTALL_CDEV +options PREEMPTION +options FREEBSD_BOOT_LOADER +options VFP # vfp/neon + +# Debugging +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +options BREAK_TO_DEBUGGER +#options VERBOSE_SYSINIT # Enable verbose sysinit messages +options KDB +options DDB # Enable the kernel debugger +#options INVARIANTS # Enable calls of extra sanity checking +#options INVARIANT_SUPPORT # Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS # Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN # Don't run witness on spinlocks for speed +#options DIAGNOSTIC + +# NFS support +options NFSCL # Network Filesystem Client +options NFSLOCKD # Network Lock Manager +options NFS_ROOT # NFS usable as /, requires NFSCLIENT + +# Uncomment this for NFS root +#options NFS_ROOT # NFS usable as /, requires NFSCL +#options BOOTP_NFSROOT +#options BOOTP_COMPAT +#options BOOTP +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=cpsw0 + +device mmc # mmc/sd bus +device mmcsd # mmc/sd flash cards +device sdhci # generic sdhci + +options ROOTDEVNAME=\"ufs:/dev/da0\" + +#options SMP + +# Pseudo devices + +device loop +device random +device pty +device md +device gpio + +# USB support +options USB_HOST_ALIGN=64 # Align usb buffers to cache line size. +device usb +options USB_DEBUG +#options USB_REQ_DEBUG +#options USB_VERBOSE +#device musb +device ehci +#device ohci + +device umass +device scbus # SCSI bus (required for SCSI) +device da # Direct Access (disks) +device pass + +# SATA +#device ata +#device atadisk +#device mvs + +# Serial ports +device uart + +# Framebuffer +device vt +device kbdmux +options SC_DFLT_FONT # compile font in +makeoptions SC_DFLT_FONT=cp437 +device ukbd + +# I2C (TWSI) +#device iic +#device iicbus + +# Ethernet +device ether +device mii +device smsc +device smscphy + +# USB ethernet support, requires miibus +device miibus +device axe # ASIX Electronics USB Ethernet +device bpf # Berkeley packet filter + +#FDT +options FDT +options FDT_DTB_STATIC +makeoptions FDT_DTS_FILE=exynos5250-chromebook.dts Copied: stable/10/sys/arm/samsung/exynos/exynos5_common.h (from r263426, head/sys/arm/samsung/exynos/exynos5_common.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/arm/samsung/exynos/exynos5_common.h Sat May 17 17:54:38 2014 (r266332, copy of r263426, head/sys/arm/samsung/exynos/exynos5_common.h) @@ -0,0 +1,40 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#define READ4(_sc, _reg) \ + bus_space_read_4(_sc->bst, _sc->bsh, _reg) +#define WRITE4(_sc, _reg, _val) \ + bus_space_write_4(_sc->bst, _sc->bsh, _reg, _val) +#define READ2(_sc, _reg) \ + bus_space_read_2(_sc->bst, _sc->bsh, _reg) +#define WRITE2(_sc, _reg, _val) \ + bus_space_write_2(_sc->bst, _sc->bsh, _reg, _val) +#define READ1(_sc, _reg) \ + bus_space_read_1(_sc->bst, _sc->bsh, _reg) +#define WRITE1(_sc, _reg, _val) \ + bus_space_write_1(_sc->bst, _sc->bsh, _reg, _val) Copied: stable/10/sys/arm/samsung/exynos/exynos5_ehci.c (from r263431, head/sys/arm/samsung/exynos/exynos5_ehci.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/arm/samsung/exynos/exynos5_ehci.c Sat May 17 17:54:38 2014 (r266332, copy of r263431, head/sys/arm/samsung/exynos/exynos5_ehci.c) @@ -0,0 +1,370 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include "opt_bus.h" + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/bus.h> +#include <sys/condvar.h> +#include <sys/rman.h> + +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + +#include <dev/usb/usb.h> +#include <dev/usb/usbdi.h> +#include <dev/usb/usb_busdma.h> +#include <dev/usb/usb_process.h> +#include <dev/usb/usb_controller.h> +#include <dev/usb/usb_bus.h> +#include <dev/usb/controller/ehci.h> +#include <dev/usb/controller/ehcireg.h> + +#include <dev/fdt/fdt_common.h> + +#include <machine/bus.h> +#include <machine/resource.h> + +#include "opt_platform.h" + +/* GPIO control */ +#define GPIO_CON(x, v) ((v) << ((x) * 4)) +#define GPIO_MASK 0xf +#define GPIO_OUTPUT 1 +#define GPIO_INPUT 0 +#define GPX3CON 0x0 +#define GPX3DAT 0x4 +#define PIN_USB 5 + +/* PWR control */ +#define EXYNOS5_PWR_USBHOST_PHY 0x708 +#define PHY_POWER_ON 1 +#define PHY_POWER_OFF 0 + +/* SYSREG */ +#define EXYNOS5_SYSREG_USB2_PHY 0x0 +#define USB2_MODE_HOST 0x1 + +/* USB HOST */ +#define HOST_CTRL_CLK_24MHZ (5 << 16) +#define HOST_CTRL_CLK_MASK (7 << 16) +#define HOST_CTRL_SIDDQ (1 << 6) +#define HOST_CTRL_SLEEP (1 << 5) +#define HOST_CTRL_SUSPEND (1 << 4) +#define HOST_CTRL_RESET_LINK (1 << 1) +#define HOST_CTRL_RESET_PHY (1 << 0) +#define HOST_CTRL_RESET_PHY_ALL (1U << 31) + +/* Forward declarations */ +static int exynos_ehci_attach(device_t dev); +static int exynos_ehci_detach(device_t dev); +static int exynos_ehci_probe(device_t dev); + +struct exynos_ehci_softc { + ehci_softc_t base; + struct resource *res[6]; + bus_space_tag_t host_bst; + bus_space_tag_t pwr_bst; + bus_space_tag_t sysreg_bst; + bus_space_tag_t gpio_bst; + bus_space_handle_t host_bsh; + bus_space_handle_t pwr_bsh; + bus_space_handle_t sysreg_bsh; + bus_space_handle_t gpio_bsh; + +}; + +static struct resource_spec exynos_ehci_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, + { SYS_RES_MEMORY, 1, RF_ACTIVE }, + { SYS_RES_MEMORY, 2, RF_ACTIVE }, + { SYS_RES_MEMORY, 3, RF_ACTIVE }, + { SYS_RES_MEMORY, 4, RF_ACTIVE }, + { SYS_RES_IRQ, 0, RF_ACTIVE }, + { -1, 0 } +}; + +static device_method_t ehci_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, exynos_ehci_probe), + DEVMETHOD(device_attach, exynos_ehci_attach), + DEVMETHOD(device_detach, exynos_ehci_detach), + DEVMETHOD(device_suspend, bus_generic_suspend), + DEVMETHOD(device_resume, bus_generic_resume), + DEVMETHOD(device_shutdown, bus_generic_shutdown), + + /* Bus interface */ + DEVMETHOD(bus_print_child, bus_generic_print_child), + + { 0, 0 } +}; + +/* kobj_class definition */ +static driver_t ehci_driver = { + "ehci", + ehci_methods, + sizeof(ehci_softc_t) +}; + +static devclass_t ehci_devclass; + +DRIVER_MODULE(ehci, simplebus, ehci_driver, ehci_devclass, 0, 0); +MODULE_DEPEND(ehci, usb, 1, 1, 1); + +/* + * Public methods + */ +static int +exynos_ehci_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (ofw_bus_is_compatible(dev, "exynos,usb-ehci") == 0) + return (ENXIO); + + device_set_desc(dev, "Exynos integrated USB controller"); + return (BUS_PROBE_DEFAULT); +} + +static int +gpio_ctrl(struct exynos_ehci_softc *esc, int dir, int power) +{ + int reg; + + /* Power control */ + reg = bus_space_read_4(esc->gpio_bst, esc->gpio_bsh, GPX3DAT); + reg &= ~(1 << PIN_USB); + reg |= (power << PIN_USB); + bus_space_write_4(esc->gpio_bst, esc->gpio_bsh, GPX3DAT, reg); + + /* Input/Output control */ + reg = bus_space_read_4(esc->gpio_bst, esc->gpio_bsh, GPX3CON); + reg &= ~GPIO_CON(PIN_USB, GPIO_MASK); + reg |= GPIO_CON(PIN_USB, dir); + bus_space_write_4(esc->gpio_bst, esc->gpio_bsh, GPX3CON, reg); + + return (0); +} + +static int +phy_init(struct exynos_ehci_softc *esc) +{ + int reg; + + gpio_ctrl(esc, GPIO_INPUT, 1); + + /* set USB HOST mode */ + bus_space_write_4(esc->sysreg_bst, esc->sysreg_bsh, + EXYNOS5_SYSREG_USB2_PHY, USB2_MODE_HOST); + + /* Power ON phy */ + bus_space_write_4(esc->pwr_bst, esc->pwr_bsh, + EXYNOS5_PWR_USBHOST_PHY, PHY_POWER_ON); + + reg = bus_space_read_4(esc->host_bst, esc->host_bsh, 0x0); + reg &= ~(HOST_CTRL_CLK_MASK | + HOST_CTRL_RESET_PHY | + HOST_CTRL_RESET_PHY_ALL | + HOST_CTRL_SIDDQ | + HOST_CTRL_SUSPEND | + HOST_CTRL_SLEEP); + + reg |= (HOST_CTRL_CLK_24MHZ | + HOST_CTRL_RESET_LINK); + bus_space_write_4(esc->host_bst, esc->host_bsh, 0x0, reg); + + DELAY(10); + + reg = bus_space_read_4(esc->host_bst, esc->host_bsh, 0x0); + reg &= ~(HOST_CTRL_RESET_LINK); + bus_space_write_4(esc->host_bst, esc->host_bsh, 0x0, reg); + + gpio_ctrl(esc, GPIO_OUTPUT, 1); + + return (0); +} + +static int +exynos_ehci_attach(device_t dev) +{ + struct exynos_ehci_softc *esc; + ehci_softc_t *sc; + bus_space_handle_t bsh; + int err; + + esc = device_get_softc(dev); + sc = &esc->base; + sc->sc_bus.parent = dev; + sc->sc_bus.devices = sc->sc_devices; + sc->sc_bus.devices_max = EHCI_MAX_DEVICES; + + if (bus_alloc_resources(dev, exynos_ehci_spec, esc->res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + /* EHCI registers */ + sc->sc_io_tag = rman_get_bustag(esc->res[0]); + bsh = rman_get_bushandle(esc->res[0]); + sc->sc_io_size = rman_get_size(esc->res[0]); + + /* EHCI HOST ctrl registers */ + esc->host_bst = rman_get_bustag(esc->res[1]); + esc->host_bsh = rman_get_bushandle(esc->res[1]); + + /* PWR registers */ + esc->pwr_bst = rman_get_bustag(esc->res[2]); + esc->pwr_bsh = rman_get_bushandle(esc->res[2]); + + /* SYSREG */ + esc->sysreg_bst = rman_get_bustag(esc->res[3]); + esc->sysreg_bsh = rman_get_bushandle(esc->res[3]); + + /* GPIO */ + esc->gpio_bst = rman_get_bustag(esc->res[4]); + esc->gpio_bsh = rman_get_bushandle(esc->res[4]); + + /* get all DMA memory */ + if (usb_bus_mem_alloc_all(&sc->sc_bus, USB_GET_DMA_TAG(dev), + &ehci_iterate_hw_softc)) + return (ENXIO); + + /* + * Set handle to USB related registers subregion used by + * generic EHCI driver. + */ + err = bus_space_subregion(sc->sc_io_tag, bsh, 0x0, + sc->sc_io_size, &sc->sc_io_hdl); + if (err != 0) + return (ENXIO); + + phy_init(esc); + + /* Setup interrupt handler */ + err = bus_setup_intr(dev, esc->res[5], INTR_TYPE_BIO | INTR_MPSAFE, + NULL, (driver_intr_t *)ehci_interrupt, sc, + &sc->sc_intr_hdl); + if (err) { + device_printf(dev, "Could not setup irq, " + "%d\n", err); + return (1); + } + + /* Add USB device */ + sc->sc_bus.bdev = device_add_child(dev, "usbus", -1); + if (!sc->sc_bus.bdev) { + device_printf(dev, "Could not add USB device\n"); + err = bus_teardown_intr(dev, esc->res[5], + sc->sc_intr_hdl); + if (err) + device_printf(dev, "Could not tear down irq," + " %d\n", err); + return (1); + } + device_set_ivars(sc->sc_bus.bdev, &sc->sc_bus); + + strlcpy(sc->sc_vendor, "Samsung", sizeof(sc->sc_vendor)); + + err = ehci_init(sc); + if (!err) { + sc->sc_flags |= EHCI_SCFLG_DONEINIT; + err = device_probe_and_attach(sc->sc_bus.bdev); + } else { + device_printf(dev, "USB init failed err=%d\n", err); + + device_delete_child(dev, sc->sc_bus.bdev); + sc->sc_bus.bdev = NULL; + + err = bus_teardown_intr(dev, esc->res[5], + sc->sc_intr_hdl); + if (err) + device_printf(dev, "Could not tear down irq," + " %d\n", err); + return (1); + } + return (0); +} + +static int +exynos_ehci_detach(device_t dev) +{ + struct exynos_ehci_softc *esc; + ehci_softc_t *sc; + int err; + + esc = device_get_softc(dev); + sc = &esc->base; + + if (sc->sc_flags & EHCI_SCFLG_DONEINIT) + return (0); + + /* + * only call ehci_detach() after ehci_init() + */ + if (sc->sc_flags & EHCI_SCFLG_DONEINIT) { + ehci_detach(sc); + sc->sc_flags &= ~EHCI_SCFLG_DONEINIT; + } + + /* + * Disable interrupts that might have been switched on in + * ehci_init. + */ + if (sc->sc_io_tag && sc->sc_io_hdl) + bus_space_write_4(sc->sc_io_tag, sc->sc_io_hdl, + EHCI_USBINTR, 0); + + if (esc->res[5] && sc->sc_intr_hdl) { + err = bus_teardown_intr(dev, esc->res[5], + sc->sc_intr_hdl); + if (err) { + device_printf(dev, "Could not tear down irq," + " %d\n", err); + return (err); + } + sc->sc_intr_hdl = NULL; + } + + if (sc->sc_bus.bdev) { + device_delete_child(dev, sc->sc_bus.bdev); + sc->sc_bus.bdev = NULL; + } + + /* During module unload there are lots of children leftover */ + device_delete_children(dev); + + bus_release_resources(dev, exynos_ehci_spec, esc->res); + + return (0); +} Copied and modified: stable/10/sys/arm/samsung/exynos/exynos5_fimd.c (from r263426, head/sys/arm/samsung/exynos/exynos5_fimd.c) ============================================================================== --- head/sys/arm/samsung/exynos/exynos5_fimd.c Thu Mar 20 17:07:14 2014 (r263426, copy source) +++ stable/10/sys/arm/samsung/exynos/exynos5_fimd.c Sat May 17 17:54:38 2014 (r266332) @@ -256,12 +256,10 @@ fimd_init(struct fimd_softc *sc) reg = panel->ivclk | panel->fixvclk; DWRITE4(sc,VIDCON1,reg); - printf("print to VIDCON0\n"); reg = (VIDCON0_ENVID | VIDCON0_ENVID_F); reg |= (panel->clkval_f << CLKVAL_F_OFFSET); WRITE4(sc,VIDCON0,reg); - printf("print to VIDCON0 2nd\n"); reg = (panel->v_pulse_width << VSYNC_PULSE_WIDTH_OFFSET); reg |= (panel->v_front_porch << V_FRONT_PORCH_OFFSET); reg |= (panel->v_back_porch << V_BACK_PORCH_OFFSET); @@ -276,10 +274,6 @@ fimd_init(struct fimd_softc *sc) reg |= ((panel->height - 1) << LINEVAL_OFFSET); DWRITE4(sc,VIDTCON2,reg); - printf("set pbase\n"); - printf("vbase is 0x%08x\n", sc->sc_info.fb_vbase); - printf("pbase is 0x%08x\n", sc->sc_info.fb_pbase); - WRITE4(sc,VIDW00ADD0B0, sc->sc_info.fb_pbase); WRITE4(sc,VIDW00ADD1B0, sc->sc_info.fb_pbase + sc->sc_info.fb_size); WRITE4(sc,VIDW00ADD2, panel->width * 2); Copied: stable/10/sys/arm/samsung/exynos/exynos5_mct.c (from r263431, head/sys/arm/samsung/exynos/exynos5_mct.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/arm/samsung/exynos/exynos5_mct.c Sat May 17 17:54:38 2014 (r266332, copy of r263431, head/sys/arm/samsung/exynos/exynos5_mct.c) @@ -0,0 +1,139 @@ +/*- + * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * This module just enables Exynos MCT, so ARMv7 Generic Timer will works + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/bus.h> +#include <sys/kernel.h> +#include <sys/module.h> +#include <sys/malloc.h> +#include <sys/rman.h> +#include <sys/timeet.h> +#include <sys/timetc.h> +#include <sys/watchdog.h> +#include <machine/bus.h> +#include <machine/cpu.h> +#include <machine/intr.h> + +#include <dev/fdt/fdt_common.h> +#include <dev/ofw/openfirm.h> +#include <dev/ofw/ofw_bus.h> +#include <dev/ofw/ofw_bus_subr.h> + +#include <machine/bus.h> +#include <machine/fdt.h> + +#define MCT_CTRL_START (1 << 8) +#define MCT_CTRL (0x240) +#define MCT_WRITE_STAT (0x24C) + +struct arm_tmr_softc { + struct resource *tmr_res[1]; + bus_space_tag_t bst; + bus_space_handle_t bsh; +}; + +static struct resource_spec arm_tmr_spec[] = { + { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Timer registers */ + { -1, 0 } +}; + +static int +arm_tmr_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_is_compatible(dev, "exynos,mct")) + return (ENXIO); + + device_set_desc(dev, "Exynos MPCore Timer"); + return (BUS_PROBE_DEFAULT); +} + +static int +arm_tmr_attach(device_t dev) +{ + struct arm_tmr_softc *sc; + int reg, i; + int mask; + + sc = device_get_softc(dev); + + if (bus_alloc_resources(dev, arm_tmr_spec, sc->tmr_res)) { + device_printf(dev, "could not allocate resources\n"); + return (ENXIO); + } + + /* Timer interface */ + sc->bst = rman_get_bustag(sc->tmr_res[0]); + sc->bsh = rman_get_bushandle(sc->tmr_res[0]); + + reg = bus_space_read_4(sc->bst, sc->bsh, MCT_CTRL); + reg |= MCT_CTRL_START; + bus_space_write_4(sc->bst, sc->bsh, MCT_CTRL, reg); + + mask = (1 << 16); + + /* Wait 10 times until written value is applied */ + for (i = 0; i < 10; i++) { + reg = bus_space_read_4(sc->bst, sc->bsh, MCT_WRITE_STAT); + if (reg & mask) { + bus_space_write_4(sc->bst, sc->bsh, + MCT_WRITE_STAT, mask); + return (0); + } + cpufunc_nullop(); + } + + /* NOTREACHED */ + + panic("Can't enable timer\n"); +} + +static device_method_t arm_tmr_methods[] = { + DEVMETHOD(device_probe, arm_tmr_probe), + DEVMETHOD(device_attach, arm_tmr_attach), + { 0, 0 } +}; + +static driver_t arm_tmr_driver = { + "mct", + arm_tmr_methods, + sizeof(struct arm_tmr_softc), +}; + +static devclass_t arm_tmr_devclass; + +DRIVER_MODULE(mct, simplebus, arm_tmr_driver, arm_tmr_devclass, 0, 0); Modified: stable/10/sys/arm/samsung/exynos/files.exynos5 ============================================================================== --- stable/10/sys/arm/samsung/exynos/files.exynos5 Sat May 17 17:34:37 2014 (r266331) +++ stable/10/sys/arm/samsung/exynos/files.exynos5 Sat May 17 17:54:38 2014 (r266332) @@ -13,11 +13,12 @@ arm/arm/bus_space-v6.c standard arm/arm/gic.c standard arm/arm/generic_timer.c standard -arm/samsung/exynos/arch_timer.c standard +arm/samsung/exynos/exynos5_mct.c standard arm/samsung/exynos/exynos5_mp.c optional smp arm/samsung/exynos/exynos5_common.c standard arm/samsung/exynos/exynos5_machdep.c standard arm/samsung/exynos/uart.c optional uart -arm/samsung/exynos/ehci_exynos5.c optional ehci +arm/samsung/exynos/exynos5_ehci.c optional ehci +arm/samsung/exynos/exynos5_fimd.c optional vt #dev/sdhci/sdhci_fdt.c optional sdhci Copied: stable/10/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts (from r263427, head/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/10/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts Sat May 17 17:54:38 2014 (r266332, copy of r263427, head/sys/boot/fdt/dts/arm/exynos5250-chromebook.dts) @@ -0,0 +1,59 @@ +/*- + * Copyright (c) 2014 Ruslan Bukin <br@bsdpad.com> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +/dts-v1/; + +/include/ "exynos5250.dtsi" + +/ { + model = "Samsung Chromebook"; + + memory { + device_type = "memory"; + reg = < 0x40000000 0x80000000 >; /* 2G */ + }; + + SOC: Exynos5@0 { + + fimd0: fimd@14400000 { + status = "okay"; + + panel-size = < 1366 768 >; + panel-hsync = < 80 32 48 >; + panel-vsync = < 14 5 3 >; + panel-clk-div = < 17 >; + panel-backlight-pin = < 25 >; + }; + + }; + + chosen { + stdin = &serial2; + stdout = &serial2; + }; +}; Modified: stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi ============================================================================== --- stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi Sat May 17 17:34:37 2014 (r266331) +++ stable/10/sys/boot/fdt/dts/arm/exynos5250.dtsi Sat May 17 17:54:38 2014 (r266332) @@ -32,7 +32,16 @@ #size-cells = <1>; interrupt-parent = <&GIC>; - Exynos5@0 { + aliases { + soc = &SOC; + serial0 = &serial0; + serial1 = &serial1; + clk0 = &clk0; + dp0 = &dp0; + fimd0 = &fimd0; + }; + + SOC: Exynos5@0 { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; @@ -48,6 +57,11 @@ #interrupt-cells = <1>; }; + clk0: clk@10010000 { + compatible = "exynos,clk"; + reg = < 0x10020000 0x20000 >; + }; + mct { compatible = "exynos,mct"; reg = < 0x101C0000 0x1000 >; @@ -72,8 +86,8 @@ reg = <0x12110000 0x1000>, /* EHCI */ <0x12130000 0x1000>, /* EHCI host ctrl */ <0x10040000 0x1000>, /* Power */ - <0x10050000 0x1000>, /* Sysreg */ - <0x11400000 0x1000>; /* GPIO left */ + <0x10050230 0x10>, /* Sysreg */ + <0x11400C60 0x10>; /* GPIO left */ interrupts = < 103 >; interrupt-parent = <&GIC>; }; @@ -153,5 +167,21 @@ current-speed = <115200>; }; + fimd0: fimd@14400000 { + compatible = "exynos,fimd"; + status = "disabled"; + reg = < 0x14400000 0x10000 >, /* fimd */ + < 0x14420000 0x10000 >, /* disp */ + < 0x10050000 0x220 >; /* sysreg */ + interrupt-parent = <&GIC>; + }; + + dp0: dp@145B0000 { + compatible = "exynos,dp"; + status = "disabled"; + reg = < 0x145B0000 0x10000 >, + < 0x10040720 0x10 >; /* PHY */ + interrupt-parent = <&GIC>; + }; }; };
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