From owner-svn-src-all@FreeBSD.ORG Thu May 12 03:25:25 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 13DA5106566C; Thu, 12 May 2011 03:25:25 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 04DE38FC08; Thu, 12 May 2011 03:25:25 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id p4C3POnS018082; Thu, 12 May 2011 03:25:24 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id p4C3POrI018080; Thu, 12 May 2011 03:25:24 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201105120325.p4C3POrI018080@svn.freebsd.org> From: Adrian Chadd Date: Thu, 12 May 2011 03:25:24 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r221801 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 12 May 2011 03:25:25 -0000 Author: adrian Date: Thu May 12 03:25:24 2011 New Revision: 221801 URL: http://svn.freebsd.org/changeset/base/221801 Log: Fix the half/quater rate PLL setup for AR5416, AR9160 and (beta?) AR9280 chips. Note: This doesn't "fix" half/quarter rate support for these chips; it merely fixes an oversight. Obtained from: Atheros Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Thu May 12 03:15:21 2011 (r221800) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_reset.c Thu May 12 03:25:24 2011 (r221801) @@ -1389,10 +1389,12 @@ ar5416InitPLL(struct ath_hal *ah, const pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); else if (IEEE80211_IS_CHAN_QUARTER(chan)) pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); - else if (IEEE80211_IS_CHAN_5GHZ(chan)) + + if (IEEE80211_IS_CHAN_5GHZ(chan)) pll |= SM(0x28, AR_RTC_SOWL_PLL_DIV); else pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV); + } else pll |= SM(0x2c, AR_RTC_SOWL_PLL_DIV); } else if (AR_SREV_SOWL_10_OR_LATER(ah)) { @@ -1402,7 +1404,8 @@ ar5416InitPLL(struct ath_hal *ah, const pll |= SM(0x1, AR_RTC_SOWL_PLL_CLKSEL); else if (IEEE80211_IS_CHAN_QUARTER(chan)) pll |= SM(0x2, AR_RTC_SOWL_PLL_CLKSEL); - else if (IEEE80211_IS_CHAN_5GHZ(chan)) + + if (IEEE80211_IS_CHAN_5GHZ(chan)) pll |= SM(0x50, AR_RTC_SOWL_PLL_DIV); else pll |= SM(0x58, AR_RTC_SOWL_PLL_DIV); @@ -1415,7 +1418,8 @@ ar5416InitPLL(struct ath_hal *ah, const pll |= SM(0x1, AR_RTC_PLL_CLKSEL); else if (IEEE80211_IS_CHAN_QUARTER(chan)) pll |= SM(0x2, AR_RTC_PLL_CLKSEL); - else if (IEEE80211_IS_CHAN_5GHZ(chan)) + + if (IEEE80211_IS_CHAN_5GHZ(chan)) pll |= SM(0xa, AR_RTC_PLL_DIV); else pll |= SM(0xb, AR_RTC_PLL_DIV);