From owner-svn-src-stable-12@freebsd.org Thu May 16 16:35:29 2019 Return-Path: Delivered-To: svn-src-stable-12@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 182B0159DFB1; Thu, 16 May 2019 16:35:29 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id B2BB28AAAB; Thu, 16 May 2019 16:35:28 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 742362371D; Thu, 16 May 2019 16:35:28 +0000 (UTC) (envelope-from hselasky@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id x4GGZSF4076417; Thu, 16 May 2019 16:35:28 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id x4GGZRpg076410; Thu, 16 May 2019 16:35:27 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201905161635.x4GGZRpg076410@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Thu, 16 May 2019 16:35:27 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r347777 - in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Group: stable-12 X-SVN-Commit-Author: hselasky X-SVN-Commit-Paths: in stable/12/sys/dev/mlx5: . mlx5_core X-SVN-Commit-Revision: 347777 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Rspamd-Queue-Id: B2BB28AAAB X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.98 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.998,0]; NEURAL_HAM_SHORT(-0.98)[-0.979,0]; ASN(0.00)[asn:11403, ipnet:2610:1c1:1::/48, country:US]; NEURAL_HAM_LONG(-1.00)[-1.000,0] X-BeenThere: svn-src-stable-12@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for only the 12-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 16 May 2019 16:35:29 -0000 Author: hselasky Date: Thu May 16 16:35:27 2019 New Revision: 347777 URL: https://svnweb.freebsd.org/changeset/base/347777 Log: MFC r347312: Add Firmware Reset Level, MFRL, register accessors in mlx5core. Submitted by: kib@ Sponsored by: Mellanox Technologies Modified: stable/12/sys/dev/mlx5/device.h stable/12/sys/dev/mlx5/driver.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h stable/12/sys/dev/mlx5/mlx5_core/mlx5_port.c stable/12/sys/dev/mlx5/mlx5_ifc.h Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/dev/mlx5/device.h ============================================================================== --- stable/12/sys/dev/mlx5/device.h Thu May 16 16:34:48 2019 (r347776) +++ stable/12/sys/dev/mlx5/device.h Thu May 16 16:35:27 2019 (r347777) @@ -1218,6 +1218,11 @@ enum { MLX5_GEN_EVENT_SUBTYPE_PCI_POWER_CHANGE_EVENT = 0x5, }; +enum { + MLX5_FRL_LEVEL3 = 0x8, + MLX5_FRL_LEVEL6 = 0x40, +}; + /* 8 regular priorities + 1 for multicast */ #define MLX5_NUM_BYPASS_FTS 9 Modified: stable/12/sys/dev/mlx5/driver.h ============================================================================== --- stable/12/sys/dev/mlx5/driver.h Thu May 16 16:34:48 2019 (r347776) +++ stable/12/sys/dev/mlx5/driver.h Thu May 16 16:35:27 2019 (r347777) @@ -154,6 +154,7 @@ enum { MLX5_REG_HOST_ENDIANNESS = 0x7004, MLX5_REG_MTMP = 0x900a, MLX5_REG_MCIA = 0x9014, + MLX5_REG_MFRL = 0x9028, MLX5_REG_MPCNT = 0x9051, MLX5_REG_MCQI = 0x9061, MLX5_REG_MCC = 0x9062, Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h Thu May 16 16:34:48 2019 (r347776) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_core.h Thu May 16 16:35:27 2019 (r347777) @@ -82,6 +82,8 @@ int mlx5_query_pcam_reg(struct mlx5_core_dev *dev, u32 u8 feature_group, u8 access_reg_group); int mlx5_query_mcam_reg(struct mlx5_core_dev *dev, u32 *mcap, u8 feature_group, u8 access_reg_group); +int mlx5_query_mfrl_reg(struct mlx5_core_dev *mdev, u8 *reset_level); +int mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level); int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); int mlx5_cmd_teardown_hca(struct mlx5_core_dev *dev); int mlx5_cmd_force_teardown_hca(struct mlx5_core_dev *dev); Modified: stable/12/sys/dev/mlx5/mlx5_core/mlx5_port.c ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_core/mlx5_port.c Thu May 16 16:34:48 2019 (r347776) +++ stable/12/sys/dev/mlx5/mlx5_core/mlx5_port.c Thu May 16 16:35:27 2019 (r347777) @@ -1210,3 +1210,29 @@ int mlx5_query_pddr_range_info(struct mlx5_core_dev *m return (0); } EXPORT_SYMBOL_GPL(mlx5_query_pddr_range_info); + +int +mlx5_query_mfrl_reg(struct mlx5_core_dev *mdev, u8 *reset_level) +{ + u32 mfrl[MLX5_ST_SZ_DW(mfrl_reg)] = {}; + int sz = MLX5_ST_SZ_BYTES(mfrl_reg); + int err; + + err = mlx5_core_access_reg(mdev, mfrl, sz, mfrl, sz, MLX5_REG_MFRL, + 0, 0); + if (err == 0) + *reset_level = MLX5_GET(mfrl_reg, mfrl, reset_level); + return (err); +} + +int +mlx5_set_mfrl_reg(struct mlx5_core_dev *mdev, u8 reset_level) +{ + u32 mfrl[MLX5_ST_SZ_DW(mfrl_reg)] = {}; + int sz = MLX5_ST_SZ_BYTES(mfrl_reg); + + MLX5_SET(mfrl_reg, mfrl, reset_level, reset_level); + + return (mlx5_core_access_reg(mdev, mfrl, sz, mfrl, sz, MLX5_REG_MFRL, + 0, 1)); +} Modified: stable/12/sys/dev/mlx5/mlx5_ifc.h ============================================================================== --- stable/12/sys/dev/mlx5/mlx5_ifc.h Thu May 16 16:34:48 2019 (r347776) +++ stable/12/sys/dev/mlx5/mlx5_ifc.h Thu May 16 16:35:27 2019 (r347777) @@ -10409,4 +10409,9 @@ struct mlx5_ifc_qpts_reg_bits { u8 trust_state[0x3]; }; +struct mlx5_ifc_mfrl_reg_bits { + u8 reserved_at_0[0x38]; + u8 reset_level[0x8]; +}; + #endif /* MLX5_IFC_H */