From owner-freebsd-amd64@FreeBSD.ORG Wed Jun 27 13:50:48 2007 Return-Path: X-Original-To: freebsd-amd64@freebsd.org Delivered-To: freebsd-amd64@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id EAEFA16A41F for ; Wed, 27 Jun 2007 13:50:48 +0000 (UTC) (envelope-from mwm-dated-1183814546.79897c@mired.org) Received: from mired.org (vpn.mired.org [66.92.153.74]) by mx1.freebsd.org (Postfix) with SMTP id 90D7A13C455 for ; Wed, 27 Jun 2007 13:50:48 +0000 (UTC) (envelope-from mwm-dated-1183814546.79897c@mired.org) Received: (qmail 45296 invoked by uid 1001); 27 Jun 2007 13:22:26 -0000 Received: by bhuda.mired.org (tmda-sendmail, from uid 1001); Wed, 27 Jun 2007 09:22:25 -0400 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Message-ID: <18050.25745.401646.292347@bhuda.mired.org> Date: Wed, 27 Jun 2007 09:22:25 -0400 To: Martin Cracauer In-Reply-To: <20070626195031.GA29545@cons.org> References: <467EFF06.6020902@gmail.com> <20070626195031.GA29545@cons.org> X-Mailer: VM 7.19 under Emacs 21.3.1 X-Primary-Address: mwm@mired.org X-face: "5Mnwy%?j>IIV\)A=):rjWL~NB2aH[}Yq8Z=u~vJ`"(,&SiLvbbz2W`; h9L,Yg`+vb1>RG% *h+%X^n0EZd>TM8_IB;a8F?(Fb"lw'IgCoyM.[Lg#r\ X-Delivery-Agent: TMDA/1.1.11 (Ladyburn) From: Mike Meyer Cc: freebsd-hackers@freebsd.org, freebsd-amd64@freebsd.org Subject: Re: Which CPUTYPE for a dualcore Xeon on AMD64 X-BeenThere: freebsd-amd64@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the AMD64 platform List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Jun 2007 13:50:49 -0000 In <20070626195031.GA29545@cons.org>, Martin Cracauer typed: > Martin Turgeon wrote on Sun, Jun 24, 2007 at 07:32:22PM -0400: > > Hi, > > > > I recently installed AMD64 6.2 Release on 2 PowerEdge servers, both with > > dual core Xeon (3070 and 5110). > I extensively benchmarked different compiler options on Xeon 5160 (3.0 > GHz Core2) with gcc-4.1.2 and gcc-4.2. Using what benchmark? That makes a *lot* of difference. > The result was within a percent of all highly tuned CPU-specific > options like -march=k8 -msse3 -mfpmath=sse -ffast-math, and I went > through most iterations. This means that locking your code to one > x86_64 implementation and locking out either AMD or Intel is not worth > the trouble. I don't think you've reached the correct conclusions. In particular, note that doing -mtune instead of -march won't lock you to a specific CPU, but will instead choose instructions/sequences optimized for your CPU. So it's a minor win with no downside. With the x86_64bit architecture, you have three choices: unset (x86 + MMX/SSE/SSE2), nocona (intel, with SSE3) and athlon64 (amd, with 3dNOW!). So changing your Xeon to nocona will just enablie SSE3. The SSE3 extensions are mostly things for doing "horizontal" computations inside the SSE register file. So unless your benchmark was doing lots of work on arrays of floats, it's unlikely you actually tested the SSE3 extensions, in which case all you did was test -mtune. Without testing the extra instructions, we don't know whether using them is worth the trouble or not, and you didn't say what your test was. 3dNOW! is an alternative, instead of an extension, to SSE/SSE2 (and maybe SSE3). People who hack such things tell me it's much spiffier than the SSE instructions, so possibly enabling it would cause those instructions to be used instead of the SSE instructions the compiler currently uses. But you didn't test this case, so we don't know how much difference it would make, and hence whether or not it's worth locking your code to AMD to get it. Thanks, http://www.mired.org/consulting.html Independent Network/Unix/Perforce consultant, email for more information.