From owner-p4-projects@FreeBSD.ORG Fri Feb 6 21:49:21 2009 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 544C81065675; Fri, 6 Feb 2009 21:49:21 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 143261065670 for ; Fri, 6 Feb 2009 21:49:21 +0000 (UTC) (envelope-from andrew@freebsd.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 026638FC1C for ; Fri, 6 Feb 2009 21:49:21 +0000 (UTC) (envelope-from andrew@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id n16LnKwU032829 for ; Fri, 6 Feb 2009 21:49:20 GMT (envelope-from andrew@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id n16LnKjj032827 for perforce@freebsd.org; Fri, 6 Feb 2009 21:49:20 GMT (envelope-from andrew@freebsd.org) Date: Fri, 6 Feb 2009 21:49:20 GMT Message-Id: <200902062149.n16LnKjj032827@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to andrew@freebsd.org using -f From: Andrew Turner To: Perforce Change Reviews Cc: Subject: PERFORCE change 157306 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 06 Feb 2009 21:49:22 -0000 http://perforce.freebsd.org/chv.cgi?CH=157306 Change 157306 by andrew@andrew_bender on 2009/02/06 21:49:07 Detect which s3c24x0 CPU we are running on. This is useful as most registers are the same so we can share drivers between the s3c2410 and s3c2440 however there are slight differences that we need to account for. Only the S3C2410A and S3C2442B are currently detected as that is all I have hardware/emulators for. Affected files ... .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#19 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_mci.c#3 edit .. //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#9 edit Differences ... ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2410.c#19 (text+ko) ==== @@ -54,6 +54,17 @@ #define IPL_LEVELS 13 u_int irqmasks[IPL_LEVELS]; +static struct { + uint32_t idcode; + const char *name; + s3c2xx0_cpu cpu; +} s3c2x0_cpu_id[] = { + { 0x32410002, "S3C2410A", CPU_S3C2410 }, + { 0x32440AAB, "S3C2442B", CPU_S3C2440 }, + + { 0, NULL } +}; + /* prototypes */ static device_t s3c2410_add_child(device_t, int, const char *, int); @@ -72,6 +83,8 @@ struct resource *); static struct resource_list *s3c2410_get_resource_list(device_t, device_t); +static void s3c24x0_identify_cpu(device_t); + static device_method_t s3c2410_methods[] = { DEVMETHOD(device_probe, s3c2410_probe), DEVMETHOD(device_attach, s3c2410_attach), @@ -331,14 +344,17 @@ S3C24X0_TIMER_SIZE, 0, &sc->sc_timer_ioh)) panic("cannot map TIMER"); -#if 0 /* calculate current clock frequency */ s3c24x0_clock_freq(&sc->sc_sx); printf(": fclk %d MHz hclk %d MHz pclk %d MHz", sc->sc_sx.sc_fclk / 1000000, sc->sc_sx.sc_hclk / 1000000, sc->sc_sx.sc_pclk / 1000000); printf("\n"); -#endif + + /* + * Identify the CPU + */ + s3c24x0_identify_cpu(dev); /* * Attach children devices @@ -378,6 +394,29 @@ return (0); } +static void +s3c24x0_identify_cpu(device_t dev) +{ + struct s3c24x0_softc *sc = device_get_softc(dev); + uint32_t idcode; + int i; + + idcode = bus_space_read_4(sc->sc_sx.sc_iot, sc->sc_sx.sc_gpio_ioh, + GPIO_GSTATUS1); + + for (i = 0; s3c2x0_cpu_id[i].name != NULL; i++) { + if (s3c2x0_cpu_id[i].idcode == idcode) + break; + } + device_printf(dev, "Found %s CPU (Chip ID: 0x%X)\n", + (s3c2x0_cpu_id[i].name != NULL) ? s3c2x0_cpu_id[i].name : "unknown", + idcode); + if (s3c2x0_cpu_id[i].name == NULL) { + panic("Unknown CPU detected"); + } + sc->sc_sx.sc_cpu = s3c2x0_cpu_id[i].cpu; +} + /* * fill sc_pclk, sc_hclk, sc_fclk from values of clock controller register. * @@ -528,6 +567,7 @@ case S3C2410_INT_ERR0: irq = S3C2410_INT_UART0; break; + case S3C2410_INT_RXD1: case S3C2410_INT_TXD1: case S3C2410_INT_ERR1: ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c24x0_mci.c#3 (text+ko) ==== @@ -483,6 +483,9 @@ case MMCBR_IVAR_VDD: *(int *)result = sc->host.ios.vdd; break; + case MMCBR_IVAR_MAX_DATA: + *(int *)result = 1; + break; } return (0); } @@ -522,6 +525,7 @@ case MMCBR_IVAR_HOST_OCR: case MMCBR_IVAR_F_MIN: case MMCBR_IVAR_F_MAX: + case MMCBR_IVAR_MAX_DATA: return (EINVAL); } return (0); ==== //depot/projects/arm/src/sys/arm/s3c2xx0/s3c2xx0var.h#9 (text+ko) ==== @@ -38,9 +38,16 @@ #include #include +typedef enum { + CPU_S3C2410, + CPU_S3C2440, +} s3c2xx0_cpu; + struct s3c2xx0_softc { device_t sc_dev; + s3c2xx0_cpu sc_cpu; + bus_space_tag_t sc_iot; bus_space_handle_t sc_intctl_ioh;