From owner-svn-src-all@FreeBSD.ORG Thu Oct 1 13:41:39 2009 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 67949106566B; Thu, 1 Oct 2009 13:41:39 +0000 (UTC) (envelope-from stas@FreeBSD.org) Received: from mx0.deglitch.com (backbone.deglitch.com [IPv6:2001:16d8:fffb:4::abba]) by mx1.freebsd.org (Postfix) with ESMTP id 0FD438FC08; Thu, 1 Oct 2009 13:41:39 +0000 (UTC) Received: from stasss.yandex.ru (dhcp170-227-red.yandex.net [95.108.170.227]) by mx0.deglitch.com (Postfix) with ESMTPSA id E9E618FC45; Thu, 1 Oct 2009 17:41:35 +0400 (MSD) Date: Thu, 1 Oct 2009 17:41:30 +0400 From: Stanislav Sedov To: Attilio Rao Message-Id: <20091001174130.0d3bec21.stas@FreeBSD.org> In-Reply-To: <3bbf2fe10910010621u72d0f692h8f9c4a783667253d@mail.gmail.com> References: <200909301326.n8UDQVB1016396@svn.freebsd.org> <3bbf2fe10910010621u72d0f692h8f9c4a783667253d@mail.gmail.com> Organization: The FreeBSD Project X-Mailer: carrier-pigeon Mime-Version: 1.0 Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg="PGP-SHA1"; boundary="Signature=_Thu__1_Oct_2009_17_41_30_+0400_z.P.0x57+AK3ERcD" Cc: svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org, Robert Watson Subject: Re: svn commit: r197643 - in head/sys: kern sys X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 01 Oct 2009 13:41:39 -0000 --Signature=_Thu__1_Oct_2009_17_41_30_+0400_z.P.0x57+AK3ERcD Content-Type: text/plain; charset=US-ASCII Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Thu, 1 Oct 2009 15:21:34 +0200 Attilio Rao mentioned: > 2009/9/30 Robert Watson : > > On Wed, 30 Sep 2009, Attilio Rao wrote: > > > >> When releasing a read/shared lock we need to use a write memory barri= er > >> in order to avoid, on architectures which doesn't have strong ordered > >> writes, CPU instructions reordering. > > > > Hi Attilio (Fabio, et al), > > > > Nice catch! Are we aware of specific reported problems that can be lai= d at > > the feet of this bug, or was this more of a "wait a moment, shouldn't t= here > > be a barrier there?". Could you comment on the scope of this problem a= cross > > architectures we support? >=20 > A possible problem related to that would be MD specific and not on > ia32/amd64 because there the barriers and simple atomics are the same. > Given that sun4v suffers of serveral other problems, that MIPS has no > SMP support, you would find it only for arm, ia64 and sparc > eventually. Thus I'm not aware of any problem which can be reconducted > to that. >=20 Actually, MIPS is going to grow SMP support really soon, and ARM cpus do not do reordering until ARMv7 afaik. So this should not result in any real problems on ARM too. OTOH, I suspect powerpc may be affected. I'm not sure if any of the models we support perform OOO, though. --=20 Stanislav Sedov ST4096-RIPE --Signature=_Thu__1_Oct_2009_17_41_30_+0400_z.P.0x57+AK3ERcD Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- iQIcBAEBAgAGBQJKxLGOAAoJEKN82nOYvCd0QGgQAJJFAhgZf49ily8LdHjGVnQF WkKOjVanvC3TGbNSaFzc4+qGZZHcfmjqCXlST0OY2szEFyA7G4kQLwuAfWZeYUJ2 x2qYzgctyc/TqsPywsELmUqUnoIeMsQ4sp9lbWMEOTQ8WtXF44y+vkP/OJt42rX4 q3cNIQz+RLYYrBUMIRUweCCJxMpt0FS2RjEE0nM0SMHJ3mmgpOFqpN4XyDbyHZ7D sYCJXF8bn4NyQy700qyJ8+EXcSyikTsAOJIII4Jtjw5aYb0Wvt9dZhRMHKQ+lxk0 VXN4hI+O+YzYM0Pl1sNDPo9nZd5hhQnF+QoCdwB2AjRi1b6D8UyjJvN1rY5NCPuL pcYqIRXJ5iQL8PiXTe7lKe+ilV8739BTcw7BPC0NYj1gYjdE/9j1iOraiJhFycLG /48ooT/tdQIB9drID5ktdRz3lq86Q3APn8qJw+D1UHq+0uEm/pZh7uAA7XlOQEl7 yp8QnH1I3ENCO7V0j340PDKVyt6fd8HDMkQ5MmeeaTFxPp+casxaIAZ7YRCYi+07 G66Py2IiecD/4LcI/qunqX+UugPUEzLvaopdeht5LzOkv+BamEJ0xefmQeZ0Z7GH qGVHiKC7ppF6AmUBgyhxfXTEhPZeHe90oxLL0TQzoOtTcae4K3mweN1WR0ao3qe7 81Kmeu/SxvGKiOLx3LYZ =caMA -----END PGP SIGNATURE----- --Signature=_Thu__1_Oct_2009_17_41_30_+0400_z.P.0x57+AK3ERcD--