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Date:      Mon, 28 Jan 2013 00:31:32 +0000 (UTC)
From:      Marius Strobl <marius@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-9@freebsd.org
Subject:   svn commit: r246018 - stable/9/sys/dev/cas
Message-ID:  <201301280031.r0S0VWBJ048891@svn.freebsd.org>
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Author: marius
Date: Mon Jan 28 00:31:32 2013
New Revision: 246018
URL: http://svnweb.freebsd.org/changeset/base/246018

Log:
  MFC: r245923
  
  - Check the return value of taskqueue_start_threads().
  - At least the Saturn chips of 501-6738 cards need a delay after freezing
    the external GMII pins before the internal PHY is accessible again. So
    wait a bit after (un)freezing these. Also don't touch the other bits of
    that configuration register. [1]
  - Take advantage of nitems().
  
  Reported and tested by: Paul Keusemann [1]

Modified:
  stable/9/sys/dev/cas/if_cas.c
Directory Properties:
  stable/9/sys/   (props changed)
  stable/9/sys/dev/   (props changed)

Modified: stable/9/sys/dev/cas/if_cas.c
==============================================================================
--- stable/9/sys/dev/cas/if_cas.c	Mon Jan 28 00:15:44 2013	(r246017)
+++ stable/9/sys/dev/cas/if_cas.c	Mon Jan 28 00:31:32 2013	(r246018)
@@ -214,8 +214,12 @@ cas_attach(struct cas_softc *sc)
 		error = ENXIO;
 		goto fail_ifnet;
 	}
-	taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
+	error = taskqueue_start_threads(&sc->sc_tq, 1, PI_NET, "%s taskq",
 	    device_get_nameunit(sc->sc_dev));
+	if (error != 0) {
+		device_printf(sc->sc_dev, "could not start threads\n");
+		goto fail_taskq;
+	}
 
 	/* Make sure the chip is stopped. */
 	cas_reset(sc);
@@ -339,10 +343,13 @@ cas_attach(struct cas_softc *sc)
 			    BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
 			/* Enable/unfreeze the GMII pins of Saturn. */
 			if (sc->sc_variant == CAS_SATURN) {
-				CAS_WRITE_4(sc, CAS_SATURN_PCFG, 0);
+				CAS_WRITE_4(sc, CAS_SATURN_PCFG,
+				    CAS_READ_4(sc, CAS_SATURN_PCFG) &
+				    ~CAS_SATURN_PCFG_FSI);
 				CAS_BARRIER(sc, CAS_SATURN_PCFG, 4,
 				    BUS_SPACE_BARRIER_READ |
 				    BUS_SPACE_BARRIER_WRITE);
+				DELAY(10000);
 			}
 			error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp,
 			    cas_mediachange, cas_mediastatus, BMSR_DEFCAPMASK,
@@ -359,10 +366,12 @@ cas_attach(struct cas_softc *sc)
 			/* Freeze the GMII pins of Saturn for saving power. */
 			if (sc->sc_variant == CAS_SATURN) {
 				CAS_WRITE_4(sc, CAS_SATURN_PCFG,
+				    CAS_READ_4(sc, CAS_SATURN_PCFG) |
 				    CAS_SATURN_PCFG_FSI);
 				CAS_BARRIER(sc, CAS_SATURN_PCFG, 4,
 				    BUS_SPACE_BARRIER_READ |
 				    BUS_SPACE_BARRIER_WRITE);
+				DELAY(10000);
 			}
 			error = mii_attach(sc->sc_dev, &sc->sc_miibus, ifp,
 			    cas_mediachange, cas_mediastatus, BMSR_DEFCAPMASK,
@@ -2865,7 +2874,7 @@ cas_pci_attach(device_t dev)
 		goto fail;
 	}
 	i = 0;
-	if (lma > 1 && pci_get_slot(dev) < sizeof(enaddr) / sizeof(*enaddr))
+	if (lma > 1 && pci_get_slot(dev) < nitems(enaddr))
 		i = pci_get_slot(dev);
 	memcpy(sc->sc_enaddr, enaddr[i], ETHER_ADDR_LEN);
 
@@ -2874,7 +2883,7 @@ cas_pci_attach(device_t dev)
 		goto fail;
 	}
 	i = 0;
-	if (phy > 1 && pci_get_slot(dev) < sizeof(pcs) / sizeof(*pcs))
+	if (phy > 1 && pci_get_slot(dev) < nitems(pcs))
 		i = pci_get_slot(dev);
 	if (pcs[i] != 0)
 		sc->sc_flags |= CAS_SERDES;

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