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Date:      Tue, 13 Oct 2015 17:21:39 +0000 (UTC)
From:      "Conrad E. Meyer" <cem@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r289233 - head/sys/dev/ntb/ntb_hw
Message-ID:  <201510131721.t9DHLdF4099865@repo.freebsd.org>

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Author: cem
Date: Tue Oct 13 17:21:38 2015
New Revision: 289233
URL: https://svnweb.freebsd.org/changeset/base/289233

Log:
  NTB: Update pci ids
  
  Add JSF, HSX, BDX ids; add two additional Xeon errata flags while we're
  here.
  
  Obtained from:	Linux
  Sponsored by:	EMC / Isilon Storage Division

Modified:
  head/sys/dev/ntb/ntb_hw/ntb_hw.c
  head/sys/dev/ntb/ntb_hw/ntb_hw.h

Modified: head/sys/dev/ntb/ntb_hw/ntb_hw.c
==============================================================================
--- head/sys/dev/ntb/ntb_hw/ntb_hw.c	Tue Oct 13 17:20:47 2015	(r289232)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw.c	Tue Oct 13 17:21:38 2015	(r289233)
@@ -199,11 +199,23 @@ static int ntb_check_link_status(struct 
 static void save_bar_parameters(struct ntb_pci_bar_info *bar);
 
 static struct ntb_hw_info pci_ids[] = {
-	{ 0x3C0D8086, "Xeon E5/Core i7 Non-Transparent Bridge B2B", NTB_XEON,
-	    NTB_REGS_THRU_MW },
 	{ 0x0C4E8086, "Atom Processor S1200 NTB Primary B2B", NTB_SOC, 0 },
-	{ 0x0E0D8086, "Xeon E5 V2 Non-Transparent Bridge B2B", NTB_XEON,
-	    NTB_REGS_THRU_MW | NTB_BAR_SIZE_4K },
+
+	/* XXX: PS/SS IDs left out until they are supported. */
+	{ 0x37258086, "JSF Xeon C35xx/C55xx Non-Transparent Bridge B2B",
+		NTB_XEON, NTB_REGS_THRU_MW | NTB_B2BDOORBELL_BIT14 },
+	{ 0x3C0D8086, "SNB Xeon E5/Core i7 Non-Transparent Bridge B2B",
+		NTB_XEON, NTB_REGS_THRU_MW | NTB_B2BDOORBELL_BIT14 },
+	{ 0x0E0D8086, "IVT Xeon E5 V2 Non-Transparent Bridge B2B", NTB_XEON,
+		NTB_REGS_THRU_MW | NTB_B2BDOORBELL_BIT14 | NTB_SB01BASE_LOCKUP
+		    | NTB_BAR_SIZE_4K },
+	{ 0x2F0D8086, "HSX Xeon E5 V3 Non-Transparent Bridge B2B", NTB_XEON,
+		NTB_REGS_THRU_MW | NTB_B2BDOORBELL_BIT14 | NTB_SB01BASE_LOCKUP
+	},
+	{ 0x6F0D8086, "BDX Xeon E5 V4 Non-Transparent Bridge B2B", NTB_XEON,
+		NTB_REGS_THRU_MW | NTB_B2BDOORBELL_BIT14 | NTB_SB01BASE_LOCKUP
+	},
+
 	{ 0x00000000, NULL, NTB_SOC, 0 }
 };
 

Modified: head/sys/dev/ntb/ntb_hw/ntb_hw.h
==============================================================================
--- head/sys/dev/ntb/ntb_hw/ntb_hw.h	Tue Oct 13 17:20:47 2015	(r289232)
+++ head/sys/dev/ntb/ntb_hw/ntb_hw.h	Tue Oct 13 17:21:38 2015	(r289233)
@@ -74,7 +74,10 @@ bool ntb_query_link_status(struct ntb_so
 device_t ntb_get_device(struct ntb_softc *ntb);
 
 #define NTB_BAR_SIZE_4K		(1 << 0)
+/* REGS_THRU_MW is the equivalent of Linux's NTB_HWERR_SDOORBELL_LOCKUP */
 #define NTB_REGS_THRU_MW	(1 << 1)
+#define NTB_SB01BASE_LOCKUP	(1 << 2)
+#define NTB_B2BDOORBELL_BIT14	(1 << 3)
 bool ntb_has_feature(struct ntb_softc *, uint64_t);
 
 #endif /* _NTB_HW_H_ */



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