Date: Mon, 22 Jan 2007 10:34:16 +0900 From: Pyun YongHyeon <pyunyh@gmail.com> To: "Stefan 'Steve' Tell" <steve.tell@crashmail.de> Cc: freebsd-stable@freebsd.org Subject: Re: Fatal trap while configuring re0 (Realtek 8136) Message-ID: <20070122013416.GA29223@cdnetworks.co.kr> In-Reply-To: <A9GweB2PhEB@zeus.crashmail.de> References: <A9GvY%2BCuhEB@zeus.crashmail.de> <A9GweB2PhEB@zeus.crashmail.de>
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--82I3+IH0IqGh5yIs Content-Type: text/plain; charset=us-ascii Content-Disposition: inline On Sun, Jan 21, 2007 at 06:36:00PM +0100, Stefan 'Steve' Tell wrote: > * Stefan 'Steve' Tell <steve.tell@crashmail.de> wrote: > > > 04:00.0 Ethernet controller: Realtek Semiconductor Co., Ltd. Unknown device > > 8136 (rev 01) (whole output at: http://zeus.crashmail.de/nopaste/?494) > > pciconf -vl > > re0@pci4:0:0: class=0x020000 card=0x105317c0 chip=0x813610ec rev=0x01 hdr=0x00 > class = network > subclass = ethernet > none3@pci6:0:0: class=0x028000 card=0x10018086 chip=0x42228086 rev=0x02 hdr=0x00 > class = network > How about attached one? -- Regards, Pyun YongHyeon --82I3+IH0IqGh5yIs Content-Type: text/plain; charset=us-ascii Content-Disposition: attachment; filename="if_re.c.patch" Index: if_re.c =================================================================== RCS file: /home/ncvs/src/sys/dev/re/if_re.c,v retrieving revision 1.82 diff -u -r1.82 if_re.c --- if_re.c 16 Jan 2007 20:35:23 -0000 1.82 +++ if_re.c 22 Jan 2007 01:32:23 -0000 @@ -2319,6 +2319,20 @@ re_tx_list_init(sc); /* + * Load the addresses of the RX and TX lists into the chip. + */ + + CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI, + RL_ADDR_HI(sc->rl_ldata.rl_rx_list_addr)); + CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO, + RL_ADDR_LO(sc->rl_ldata.rl_rx_list_addr)); + + CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI, + RL_ADDR_HI(sc->rl_ldata.rl_tx_list_addr)); + CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO, + RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); + + /* * Enable transmit and receive. */ CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); @@ -2335,6 +2349,9 @@ RL_TXCFG_CONFIG|RL_LOOPTEST_ON_CPLUS); } else CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG); + + CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16); + CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG); /* Set the individual bit to receive frames for this host only. */ @@ -2389,21 +2406,6 @@ /* Enable receiver and transmitter. */ CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB); #endif - /* - * Load the addresses of the RX and TX lists into the chip. - */ - - CSR_WRITE_4(sc, RL_RXLIST_ADDR_HI, - RL_ADDR_HI(sc->rl_ldata.rl_rx_list_addr)); - CSR_WRITE_4(sc, RL_RXLIST_ADDR_LO, - RL_ADDR_LO(sc->rl_ldata.rl_rx_list_addr)); - - CSR_WRITE_4(sc, RL_TXLIST_ADDR_HI, - RL_ADDR_HI(sc->rl_ldata.rl_tx_list_addr)); - CSR_WRITE_4(sc, RL_TXLIST_ADDR_LO, - RL_ADDR_LO(sc->rl_ldata.rl_tx_list_addr)); - - CSR_WRITE_1(sc, RL_EARLY_TX_THRESH, 16); #ifdef RE_TX_MODERATION /* --82I3+IH0IqGh5yIs--
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