From owner-svn-src-head@FreeBSD.ORG Fri Apr 26 05:42:35 2013 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.FreeBSD.org [8.8.178.115]) by hub.freebsd.org (Postfix) with ESMTP id 8D2FAE2B; Fri, 26 Apr 2013 05:42:35 +0000 (UTC) (envelope-from imp@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) by mx1.freebsd.org (Postfix) with ESMTP id 800731E50; Fri, 26 Apr 2013 05:42:35 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.6/8.14.6) with ESMTP id r3Q5gZOI017691; Fri, 26 Apr 2013 05:42:35 GMT (envelope-from imp@svn.freebsd.org) Received: (from imp@localhost) by svn.freebsd.org (8.14.6/8.14.5/Submit) id r3Q5gZvw017690; Fri, 26 Apr 2013 05:42:35 GMT (envelope-from imp@svn.freebsd.org) Message-Id: <201304260542.r3Q5gZvw017690@svn.freebsd.org> From: Warner Losh Date: Fri, 26 Apr 2013 05:42:35 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r249919 - head/sys/mips/cavium X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 26 Apr 2013 05:42:35 -0000 Author: imp Date: Fri Apr 26 05:42:35 2013 New Revision: 249919 URL: http://svnweb.freebsd.org/changeset/base/249919 Log: Octeon 2 (6xxx) and newer CPUs don't use the clock CPU speed for its I/O clock. Thankfully, the simple executive provies a way to querry the proper clock that works on all models. Move to asking for the SCLK via this interface. This gets the serial console working after we start init and open the console and set the divisor (which turned the output from good to bad). I can login on the console now. Modified: head/sys/mips/cavium/uart_dev_oct16550.c Modified: head/sys/mips/cavium/uart_dev_oct16550.c ============================================================================== --- head/sys/mips/cavium/uart_dev_oct16550.c Fri Apr 26 05:18:18 2013 (r249918) +++ head/sys/mips/cavium/uart_dev_oct16550.c Fri Apr 26 05:42:35 2013 (r249919) @@ -656,7 +656,7 @@ oct16550_bus_probe (struct uart_softc *s int error; bas = &sc->sc_bas; - bas->rclk = uart_oct16550_class.uc_rclk = cvmx_sysinfo_get()->cpu_clock_hz; + bas->rclk = uart_oct16550_class.uc_rclk = cvmx_clock_get_rate(CVMX_CLOCK_SCLK); error = oct16550_probe(bas); if (error) {