Date: Fri, 22 Aug 2003 09:31:10 -0700 (PDT) From: Sam Leffler <sam@FreeBSD.org> To: Perforce Change Reviews <perforce@freebsd.org> Subject: PERFORCE change 36677 for review Message-ID: <200308221631.h7MGVARZ023933@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=36677 Change 36677 by sam@sam_ebb on 2003/08/22 09:31:10 merge bits of ATAng to simplify integrations Affected files ... .. //depot/projects/netperf/sys/conf/files#4 edit .. //depot/projects/netperf/sys/conf/options#6 edit .. //depot/projects/netperf/sys/sys/ata.h#2 edit Differences ... ==== //depot/projects/netperf/sys/conf/files#4 (text+ko) ==== @@ -302,6 +302,8 @@ dev/an/if_an_pci.c optional an pci dev/asr/asr.c optional asr pci dev/ata/ata-all.c optional ata +dev/ata/ata-queue.c optional ata +dev/ata/ata-lowlevel.c optional ata dev/ata/ata-isa.c optional ata isa dev/ata/ata-cbus.c optional ata pc98 dev/ata/ata-card.c optional ata card @@ -310,11 +312,7 @@ dev/ata/ata-chipset.c optional ata pci dev/ata/ata-dma.c optional ata pci dev/ata/ata-disk.c optional atadisk -dev/ata/ata-raid.c optional atadisk -dev/ata/atapi-all.c optional atapicd -dev/ata/atapi-all.c optional atapifd -dev/ata/atapi-all.c optional atapist -dev/ata/atapi-all.c optional atapicam +dev/ata/ata-raid.c optional ataraid dev/ata/atapi-cd.c optional atapicd dev/ata/atapi-fd.c optional atapifd dev/ata/atapi-tape.c optional atapist ==== //depot/projects/netperf/sys/conf/options#6 (text+ko) ==== @@ -296,13 +296,10 @@ ISP_FW_CRASH_DUMP opt_isp.h # Options used in the 'ata' ATA/ATAPI driver -ACD_DEBUG opt_ata.h -AST_DEBUG opt_ata.h -ATAPI_DEBUG opt_ata.h -ATA_DEBUG opt_ata.h ATA_STATIC_ID opt_ata.h ATA_NOPCI opt_ata.h DEV_ATADISK opt_ata.h +DEV_ATARAID opt_ata.h DEV_ATAPICD opt_ata.h DEV_ATAPIST opt_ata.h DEV_ATAPIFD opt_ata.h ==== //depot/projects/netperf/sys/sys/ata.h#2 (text+ko) ==== @@ -33,57 +33,22 @@ #include <sys/ioccom.h> -#define ATAPI_PSIZE_12 0 /* 12 bytes */ -#define ATAPI_PSIZE_16 1 /* 16 bytes */ - -#define ATAPI_DRQT_MPROC 0 /* cpu 3 ms delay */ -#define ATAPI_DRQT_INTR 1 /* intr 10 ms delay */ -#define ATAPI_DRQT_ACCEL 2 /* accel 50 us delay */ - -#define ATAPI_TYPE_DIRECT 0 /* disk/floppy */ -#define ATAPI_TYPE_TAPE 1 /* streaming tape */ -#define ATAPI_TYPE_CDROM 5 /* CD-ROM device */ -#define ATAPI_TYPE_OPTICAL 7 /* optical disk */ - -#define ATA_PROTO_ATA 0 -#define ATA_PROTO_ATAPI 1 - -#define ATA_BT_SINGLEPORTSECTOR 1 /* 1 port, 1 sector buffer */ -#define ATA_BT_DUALPORTMULTI 2 /* 2 port, mult sector buffer */ -#define ATA_BT_DUALPORTMULTICACHE 3 /* above plus track cache */ - -#define ATA_FLAG_54_58 1 /* words 54-58 valid */ -#define ATA_FLAG_64_70 2 /* words 64-70 valid */ -#define ATA_FLAG_88 4 /* word 88 valid */ - -/* ATA/ATAPI device parameter information */ +/* ATA/ATAPI device parameters */ struct ata_params { - -#if BYTE_ORDER == LITTLE_ENDIAN -/*000*/ u_int16_t packet_size :2; /* packet command size */ - - u_int16_t incomplete :1; - u_int16_t :2; - u_int16_t drq_type :2; /* DRQ type */ - - u_int16_t removable :1; /* device is removable */ - u_int16_t type :5; /* device type */ - - u_int16_t :2; - u_int16_t cmd_protocol :1; /* command protocol */ -#else - u_int16_t cmd_protocol :1; /* command protocol */ - u_int16_t :2; - - u_int16_t type :5; /* device type */ - u_int16_t removable :1; /* device is removable */ - - u_int16_t drq_type :2; /* DRQ type */ - u_int16_t :2; - u_int16_t incomplete :1; - - u_int16_t packet_size :2; /* packet command size */ -#endif +/*000*/ u_int16_t config; /* configuration info */ +#define ATA_PROTO_MASK 0x8003 +#define ATA_PROTO_ATA 0x0002 +#define ATA_PROTO_ATAPI_12 0x8000 +#define ATA_PROTO_ATAPI_16 0x8001 +#define ATA_ATAPI_TYPE_MASK 0x1f00 +#define ATA_ATAPI_TYPE_DIRECT 0x0000 /* disk/floppy */ +#define ATA_ATAPI_TYPE_TAPE 0x0100 /* streaming tape */ +#define ATA_ATAPI_TYPE_CDROM 0x0500 /* CD-ROM device */ +#define ATA_ATAPI_TYPE_OPTICAL 0x0700 /* optical disk */ +#define ATA_DRQ_MASK 0x0060 +#define ATA_DRQ_SLOW 0x0000 /* cpu 3 ms delay */ +#define ATA_DRQ_INTR 0x0020 /* interrupt 10 ms delay */ +#define ATA_DRQ_FAST 0x0040 /* accel 50 us delay */ /*001*/ u_int16_t cylinders; /* # of cylinders */ u_int16_t reserved2; @@ -93,77 +58,33 @@ /*006*/ u_int16_t sectors; /* # sectors/track */ /*007*/ u_int16_t vendor7[3]; /*010*/ u_int8_t serial[20]; /* serial number */ - u_int16_t retired20; +/*020*/ u_int16_t retired20; u_int16_t retired21; u_int16_t obsolete22; /*023*/ u_int8_t revision[8]; /* firmware revision */ /*027*/ u_int8_t model[40]; /* model name */ - -#if BYTE_ORDER == LITTLE_ENDIAN -/*047*/ u_int16_t sectors_intr:8; /* sectors per interrupt */ - u_int16_t :8; -#else - u_int16_t :8; - u_int16_t sectors_intr:8; /* sectors per interrupt */ -#endif - +/*047*/ u_int16_t sectors_intr; /* sectors per interrupt */ /*048*/ u_int16_t usedmovsd; /* double word read/write? */ +/*049*/ u_int16_t capabilities1; +#define ATA_SUPPORT_DMA 0x0100 +#define ATA_SUPPORT_LBA 0x0200 +#define ATA_SUPPORT_OVERLAP 0x4000 -#if BYTE_ORDER == LITTLE_ENDIAN -/*049*/ u_int16_t retired49:8; - u_int16_t support_dma :1; /* DMA supported */ - u_int16_t support_lba :1; /* LBA supported */ - u_int16_t disable_iordy :1; /* IORDY may be disabled */ - u_int16_t support_iordy :1; /* IORDY supported */ - u_int16_t softreset :1; /* needs softreset when busy */ - u_int16_t stdby_ovlap :1; /* standby/overlap supported */ - u_int16_t support_queueing:1; /* supports queuing overlap */ - u_int16_t support_idma :1; /* interleaved DMA supported */ +/*050*/ u_int16_t capabilities2; +/*051*/ u_int16_t retired_piomode; /* PIO modes 0-2 */ +#define ATA_RETIRED_PIO_MASK 0x0003 -/*050*/ u_int16_t device_stdby_min:1; - u_int16_t :13; - u_int16_t capability_one:1; - u_int16_t capability_zero:1; - -/*051*/ u_int16_t vendor51:8; - u_int16_t retired_piomode:8; /* PIO modes 0-2 */ -/*052*/ u_int16_t vendor52:8; - u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */ -#else - u_int16_t support_idma :1; /* interleaved DMA supported */ - u_int16_t support_queueing:1; /* supports queuing overlap */ - u_int16_t stdby_ovlap :1; /* standby/overlap supported */ - u_int16_t softreset :1; /* needs softreset when busy */ - u_int16_t support_iordy :1; /* IORDY supported */ - u_int16_t disable_iordy :1; /* IORDY may be disabled */ - u_int16_t support_lba :1; /* LBA supported */ - u_int16_t support_dma :1; /* DMA supported */ - u_int16_t retired49:8; - - u_int16_t capability_zero:1; - u_int16_t capability_one:1; - u_int16_t :13; - u_int16_t device_stdby_min:1; +/*052*/ u_int16_t retired_dmamode; /* DMA modes */ +#define ATA_RETIRED_DMA_MASK 0x0003 - u_int16_t retired_piomode:8; /* PIO modes 0-2 */ - u_int16_t vendor51:8; - u_int16_t retired_dmamode:8; /* DMA modes, not ATA-3 */ - u_int16_t vendor52:8; -#endif - /*053*/ u_int16_t atavalid; /* fields valid */ +#define ATA_FLAG_54_58 0x0001 /* words 54-58 valid */ +#define ATA_FLAG_64_70 0x0002 /* words 64-70 valid */ +#define ATA_FLAG_88 0x0004 /* word 88 valid */ - u_int16_t obsolete54[5]; - -#if BYTE_ORDER == LITTLE_ENDIAN -/*059*/ u_int16_t multi_count:8; - u_int16_t multi_valid:1; - u_int16_t :7; -#else - u_int16_t :7; - u_int16_t multi_valid:1; - u_int16_t multi_count:8; -#endif +/*054*/ u_int16_t obsolete54[5]; +/*059*/ u_int16_t multi; +#define ATA_MULTI_VALID 0x0100 /*060*/ u_int16_t lba_size_1; u_int16_t lba_size_2; @@ -181,14 +102,8 @@ /*072*/ u_int16_t rlsservice; /* rel time (us) for service */ u_int16_t reserved73; u_int16_t reserved74; - -#if BYTE_ORDER == LITTLE_ENDIAN -/*075*/ u_int16_t queuelen:5; - u_int16_t :11; -#else - u_int16_t :11; - u_int16_t queuelen:5; -#endif +/*075*/ u_int16_t queue; +#define ATA_QUEUE_LEN(x) ((x) & 0x001f) u_int16_t reserved76; u_int16_t reserved77; @@ -196,96 +111,40 @@ u_int16_t reserved79; /*080*/ u_int16_t version_major; /*081*/ u_int16_t version_minor; + struct { -#if BYTE_ORDER == LITTLE_ENDIAN -/*082/085*/ u_int16_t smart:1; - u_int16_t security:1; - u_int16_t removable:1; - u_int16_t power_mngt:1; - u_int16_t packet:1; - u_int16_t write_cache:1; - u_int16_t look_ahead:1; - u_int16_t release_irq:1; - u_int16_t service_irq:1; - u_int16_t reset:1; - u_int16_t protected:1; - u_int16_t :1; - u_int16_t write_buffer:1; - u_int16_t read_buffer:1; - u_int16_t nop:1; - u_int16_t :1; +/*082/085*/ u_int16_t command1; +#define ATA_SUPPORT_SMART 0x0001 +#define ATA_SUPPORT_SECURITY 0x0002 +#define ATA_SUPPORT_REMOVABLE 0x0004 +#define ATA_SUPPORT_POWERMGT 0x0008 +#define ATA_SUPPORT_PACKET 0x0010 +#define ATA_SUPPORT_WRITECACHE 0x0020 +#define ATA_SUPPORT_LOOKAHEAD 0x0040 +#define ATA_SUPPORT_RELEASEIRQ 0x0080 +#define ATA_SUPPORT_SERVICEIRQ 0x0100 +#define ATA_SUPPORT_RESET 0x0200 +#define ATA_SUPPORT_PROTECTED 0x0400 +#define ATA_SUPPORT_WRITEBUFFER 0x1000 +#define ATA_SUPPORT_READBUFFER 0x2000 +#define ATA_SUPPORT_NOP 0x4000 -/*083/086*/ u_int16_t microcode:1; - u_int16_t queued:1; - u_int16_t cfa:1; - u_int16_t apm:1; - u_int16_t notify:1; - u_int16_t standby:1; - u_int16_t spinup:1; - u_int16_t :1; - u_int16_t max_security:1; - u_int16_t auto_acoustic:1; - u_int16_t address48:1; - u_int16_t config_overlay:1; - u_int16_t flush_cache:1; - u_int16_t flush_cache48:1; - u_int16_t support_one:1; - u_int16_t support_zero:1; +/*083/086*/ u_int16_t command2; +#define ATA_SUPPORT_MICROCODE 0x0001 +#define ATA_SUPPORT_QUEUED 0x0002 +#define ATA_SUPPORT_CFA 0x0004 +#define ATA_SUPPORT_APM 0x0008 +#define ATA_SUPPORT_NOTIFY 0x0010 +#define ATA_SUPPORT_STANDBY 0x0020 +#define ATA_SUPPORT_SPINUP 0x0040 +#define ATA_SUPPORT_MAXSECURITY 0x0100 +#define ATA_SUPPORT_AUTOACOUSTIC 0x0200 +#define ATA_SUPPORT_ADDRESS48 0x0400 +#define ATA_SUPPORT_OVERLAY 0x0800 +#define ATA_SUPPORT_FLUSHCACHE 0x1000 +#define ATA_SUPPORT_FLUSHCACHE48 0x2000 -/*084/087*/ u_int16_t smart_error_log:1; - u_int16_t smart_self_test:1; - u_int16_t media_serial_no:1; - u_int16_t media_card_pass:1; - u_int16_t streaming:1; - u_int16_t logging:1; - u_int16_t :8; - u_int16_t extended_one:1; - u_int16_t extended_zero:1; -#else - u_int16_t :1; - u_int16_t nop:1; - u_int16_t read_buffer:1; - u_int16_t write_buffer:1; - u_int16_t :1; - u_int16_t protected:1; - u_int16_t reset:1; - u_int16_t service_irq:1; - u_int16_t release_irq:1; - u_int16_t look_ahead:1; - u_int16_t write_cache:1; - u_int16_t packet:1; - u_int16_t power_mngt:1; - u_int16_t removable:1; - u_int16_t security:1; - u_int16_t smart:1; - - u_int16_t support_zero:1; - u_int16_t support_one:1; - u_int16_t flush_cache48:1; - u_int16_t flush_cache:1; - u_int16_t config_overlay:1; - u_int16_t address48:1; - u_int16_t auto_acoustic:1; - u_int16_t max_security:1; - u_int16_t :1; - u_int16_t spinup:1; - u_int16_t standby:1; - u_int16_t notify:1; - u_int16_t apm:1; - u_int16_t cfa:1; - u_int16_t queued:1; - u_int16_t microcode:1; - - u_int16_t extended_zero:1; - u_int16_t extended_one:1; - u_int16_t :8; - u_int16_t logging:1; - u_int16_t streaming:1; - u_int16_t media_card_pass:1; - u_int16_t media_serial_no:1; - u_int16_t smart_self_test:1; - u_int16_t smart_error_log:1; -#endif +/*084/087*/ u_int16_t extension; } support, enabled; /*088*/ u_int16_t udmamodes; /* UltraDMA modes */ @@ -293,25 +152,13 @@ /*090*/ u_int16_t enhanced_erase_time; /*091*/ u_int16_t apm_value; /*092*/ u_int16_t master_passwd_revision; +/*093*/ u_int16_t hwres; +#define ATA_CABLE_ID 0x2000 -#if BYTE_ORDER == LITTLE_ENDIAN -/*093*/ u_int16_t hwres_master :8; - u_int16_t hwres_slave :5; - u_int16_t hwres_cblid :1; - u_int16_t hwres_valid:2; - -/*094*/ u_int16_t current_acoustic:8; - u_int16_t vendor_acoustic:8; -#else - u_int16_t hwres_valid:2; - u_int16_t hwres_cblid :1; - u_int16_t hwres_slave :5; - u_int16_t hwres_master :8; +/*094*/ u_int16_t acoustic; +#define ATA_ACOUSTIC_CURRENT(x) ((x) & 0x00ff) +#define ATA_ACOUSTIC_VENDOR(x) (((x) & 0xff00) >> 8) - u_int16_t vendor_acoustic:8; - u_int16_t current_acoustic:8; -#endif - /*095*/ u_int16_t stream_min_req_size; /*096*/ u_int16_t stream_transfer_time; /*097*/ u_int16_t stream_access_latency; @@ -331,6 +178,7 @@ /*255*/ u_int16_t integrity; }; +/* ATA transfer modes */ #define ATA_MODE_MASK 0x0f #define ATA_DMA_MASK 0xf0 #define ATA_PIO 0x00 @@ -354,34 +202,160 @@ #define ATA_SA150 0x47 #define ATA_DMA_MAX 0x4f +/* ATA commands */ +#define ATA_NOP 0x00 /* NOP command */ +#define ATA_NF_FLUSHQUEUE 0x00 /* flush queued cmd's */ +#define ATA_NF_AUTOPOLL 0x01 /* start autopoll function */ +#define ATA_ATAPI_RESET 0x08 /* reset ATAPI device */ +#define ATA_READ 0x20 /* read command */ +#define ATA_READ48 0x24 /* read command */ +#define ATA_READ_DMA48 0x25 /* read w/DMA command */ +#define ATA_READ_DMA_QUEUED48 0x26 /* read w/DMA QUEUED command */ +#define ATA_READ_MUL48 0x29 /* read multi command */ +#define ATA_WRITE 0x30 /* write command */ +#define ATA_WRITE48 0x34 /* write command */ +#define ATA_WRITE_DMA48 0x35 /* write w/DMA command */ +#define ATA_WRITE_DMA_QUEUED48 0x36 /* write w/DMA QUEUED command */ +#define ATA_WRITE_MUL48 0x39 /* write multi command */ +#define ATA_PACKET_CMD 0xa0 /* packet command */ +#define ATA_ATAPI_IDENTIFY 0xa1 /* get ATAPI params*/ +#define ATA_SERVICE 0xa2 /* service command */ +#define ATA_READ_MUL 0xc4 /* read multi command */ +#define ATA_WRITE_MUL 0xc5 /* write multi command */ +#define ATA_SET_MULTI 0xc6 /* set multi size command */ +#define ATA_READ_DMA_QUEUED 0xc7 /* read w/DMA QUEUED command */ +#define ATA_READ_DMA 0xc8 /* read w/DMA command */ +#define ATA_WRITE_DMA 0xca /* write w/DMA command */ +#define ATA_WRITE_DMA_QUEUED 0xcc /* write w/DMA QUEUED command */ +#define ATA_SLEEP 0xe6 /* sleep command */ +#define ATA_FLUSHCACHE 0xe7 /* flush cache to disk */ +#define ATA_FLUSHCACHE48 0xea /* flush cache to disk */ +#define ATA_ATA_IDENTIFY 0xec /* get ATA params */ +#define ATA_SETFEATURES 0xef /* features command */ +#define ATA_SF_SETXFER 0x03 /* set transfer mode */ +#define ATA_SF_ENAB_WCACHE 0x02 /* enable write cache */ +#define ATA_SF_DIS_WCACHE 0x82 /* disable write cache */ +#define ATA_SF_ENAB_RCACHE 0xaa /* enable readahead cache */ +#define ATA_SF_DIS_RCACHE 0x55 /* disable readahead cache */ +#define ATA_SF_ENAB_RELIRQ 0x5d /* enable release interrupt */ +#define ATA_SF_DIS_RELIRQ 0xdd /* disable release interrupt */ +#define ATA_SF_ENAB_SRVIRQ 0x5e /* enable service interrupt */ +#define ATA_SF_DIS_SRVIRQ 0xde /* disable service interrupt */ + +/* ATAPI commands */ +#define ATAPI_TEST_UNIT_READY 0x00 /* check if device is ready */ +#define ATAPI_REZERO 0x01 /* rewind */ +#define ATAPI_REQUEST_SENSE 0x03 /* get sense data */ +#define ATAPI_FORMAT 0x04 /* format unit */ +#define ATAPI_READ 0x08 /* read data */ +#define ATAPI_WRITE 0x0a /* write data */ +#define ATAPI_WEOF 0x10 /* write filemark */ +#define ATAPI_WF_WRITE 0x01 +#define ATAPI_SPACE 0x11 /* space command */ +#define ATAPI_SP_FM 0x01 +#define ATAPI_SP_EOD 0x03 +#define ATAPI_MODE_SELECT 0x15 /* mode select */ +#define ATAPI_ERASE 0x19 /* erase */ +#define ATAPI_MODE_SENSE 0x1a /* mode sense */ +#define ATAPI_START_STOP 0x1b /* start/stop unit */ +#define ATAPI_SS_LOAD 0x01 +#define ATAPI_SS_RETENSION 0x02 +#define ATAPI_SS_EJECT 0x04 +#define ATAPI_PREVENT_ALLOW 0x1e /* media removal */ +#define ATAPI_READ_FORMAT_CAPACITIES 0x23 /* get format capacities */ +#define ATAPI_READ_CAPACITY 0x25 /* get volume capacity */ +#define ATAPI_READ_BIG 0x28 /* read data */ +#define ATAPI_WRITE_BIG 0x2a /* write data */ +#define ATAPI_LOCATE 0x2b /* locate to position */ +#define ATAPI_READ_POSITION 0x34 /* read position */ +#define ATAPI_SYNCHRONIZE_CACHE 0x35 /* flush buf, close channel */ +#define ATAPI_WRITE_BUFFER 0x3b /* write device buffer */ +#define ATAPI_READ_BUFFER 0x3c /* read device buffer */ +#define ATAPI_READ_SUBCHANNEL 0x42 /* get subchannel info */ +#define ATAPI_READ_TOC 0x43 /* get table of contents */ +#define ATAPI_PLAY_10 0x45 /* play by lba */ +#define ATAPI_PLAY_MSF 0x47 /* play by MSF address */ +#define ATAPI_PLAY_TRACK 0x48 /* play by track number */ +#define ATAPI_PAUSE 0x4b /* pause audio operation */ +#define ATAPI_READ_DISK_INFO 0x51 /* get disk info structure */ +#define ATAPI_READ_TRACK_INFO 0x52 /* get track info structure */ +#define ATAPI_RESERVE_TRACK 0x53 /* reserve track */ +#define ATAPI_SEND_OPC_INFO 0x54 /* send OPC structurek */ +#define ATAPI_MODE_SELECT_BIG 0x55 /* set device parameters */ +#define ATAPI_REPAIR_TRACK 0x58 /* repair track */ +#define ATAPI_READ_MASTER_CUE 0x59 /* read master CUE info */ +#define ATAPI_MODE_SENSE_BIG 0x5a /* get device parameters */ +#define ATAPI_CLOSE_TRACK 0x5b /* close track/session */ +#define ATAPI_READ_BUFFER_CAPACITY 0x5c /* get buffer capicity */ +#define ATAPI_SEND_CUE_SHEET 0x5d /* send CUE sheet */ +#define ATAPI_BLANK 0xa1 /* blank the media */ +#define ATAPI_SEND_KEY 0xa3 /* send DVD key structure */ +#define ATAPI_REPORT_KEY 0xa4 /* get DVD key structure */ +#define ATAPI_PLAY_12 0xa5 /* play by lba */ +#define ATAPI_LOAD_UNLOAD 0xa6 /* changer control command */ +#define ATAPI_READ_STRUCTURE 0xad /* get DVD structure */ +#define ATAPI_PLAY_CD 0xb4 /* universal play command */ +#define ATAPI_SET_SPEED 0xbb /* set drive speed */ +#define ATAPI_MECH_STATUS 0xbd /* get changer status */ +#define ATAPI_READ_CD 0xbe /* read data */ +#define ATAPI_POLL_DSC 0xff /* poll DSC status bit */ + struct ata_cmd { int channel; int device; int cmd; -#define ATAGPARM 1 -#define ATAGMODE 2 -#define ATASMODE 3 -#define ATAREINIT 4 -#define ATAATTACH 5 -#define ATADETACH 6 -#define ATAPICMD 7 -#define ATARAIDREBUILD 8 -#define ATARAIDCREATE 9 -#define ATARAIDDELETE 10 -#define ATARAIDSTATUS 11 -#define ATAENCSTAT 12 -#define ATAGMAXCHANNEL 13 -#define ATARAIDADDSPARE 14 +#define ATAGMAXCHANNEL 0x0101 +#define ATAGPARM 0x0102 +#define ATAGMODE 0x0103 +#define ATASMODE 0x0104 +#define ATAREQUEST 0x0108 +#define ATAREINIT 0x0110 +#define ATAATTACH 0x0111 +#define ATADETACH 0x0112 +#define ATARAIDCREATE 0x0120 +#define ATARAIDDELETE 0x0121 +#define ATARAIDSTATUS 0x0122 +#define ATARAIDADDSPARE 0x0123 +#define ATARAIDREBUILD 0x0124 +#define ATAENCSTAT 0x0130 union { + int maxchan; + struct { - int mode[2]; - } mode; - struct { int type[2]; char name[2][32]; struct ata_params params[2]; } param; + + struct { + int mode[2]; + } mode; + + struct { + union { + struct { + u_int8_t command; + u_int8_t feature; + u_int64_t lba; + u_int16_t count; + } ata; + struct { + char ccb[16]; + } atapi; + } u; + caddr_t data; + int count; + int flags; +#define ATA_CMD_CONTROL 0x01 +#define ATA_CMD_READ 0x02 +#define ATA_CMD_WRITE 0x04 +#define ATA_CMD_ATAPI 0x08 + + int timeout; + int error; + } request; + struct raid_setup { int type; #define AR_RAID0 1 @@ -393,9 +367,7 @@ int interleave; int unit; } raid_setup; - struct { - int disk; - } raid_spare; + struct raid_status { int type; int total_disks; @@ -408,26 +380,17 @@ int progress; } raid_status; + + struct { + int disk; + } raid_spare; + struct { int fan; int temp; int v05; int v12; } enclosure; - struct { - char ccb[16]; - caddr_t data; - int count; - int flags; -#define ATAPI_CMD_CTRL 0x00 -#define ATAPI_CMD_READ 0x01 -#define ATAPI_CMD_WRITE 0x02 - - int timeout; - int error; - char sense_data[18]; - } atapi; - int maxchan; } u; };
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