From owner-freebsd-current@FreeBSD.ORG Wed Aug 29 22:03:13 2007 Return-Path: Delivered-To: current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 334E416A41B for ; Wed, 29 Aug 2007 22:03:13 +0000 (UTC) (envelope-from bruce@cran.org.uk) Received: from muon.bluestop.org (muon.bluestop.org [80.68.94.188]) by mx1.freebsd.org (Postfix) with ESMTP id CFABC13C45B for ; Wed, 29 Aug 2007 22:03:12 +0000 (UTC) (envelope-from bruce@cran.org.uk) Received: from muon.draftnet (dyn-62-56-112-132.dslaccess.co.uk [62.56.112.132]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by muon.bluestop.org (Postfix) with ESMTP id 384043000D; Wed, 29 Aug 2007 22:59:08 +0100 (BST) Message-ID: <46D5ECD9.9020605@cran.org.uk> Date: Wed, 29 Aug 2007 23:02:01 +0100 From: Bruce Cran User-Agent: Thunderbird 2.0.0.6 (X11/20070809) MIME-Version: 1.0 To: =?ISO-8859-1?Q?Bj=F6rn_K=F6nig?= References: <-3502020561049594852@unknownmsgid> <20070829191310.GA50909@freebsd.org> <50152.2001:6f8:101e:0:20e:cff:fe6d:6adb.1188416964.squirrel@webmail.alpha-tierchen.de> In-Reply-To: <50152.2001:6f8:101e:0:20e:cff:fe6d:6adb.1188416964.squirrel@webmail.alpha-tierchen.de> Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 8bit Cc: Roman Divacky , pluknet , current@freebsd.org Subject: Re: Adding k9 and k10 to bsd.cpu.mk X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Aug 2007 22:03:13 -0000 Björn König wrote: > Roman Divacky wrote: > > >> I dont think the name matters THAT MUCH, the important thing is >> to support the newer CPUs with FreeBSD infrastructure... name >> it "blahblah" if you wish >> > > I agree. > > Intel's first Pentium 4 with SSE3 is called "prescott". We could use > "venice" analogously to represent SSE3-capable Athlon64 CPUs. > Would it be possible to indicate whether SSE3 is supported during boot? I have a Turion 64 X2 which from what I've read supports SSE3 but while SSE and SSE2 are listed as CPU features during boot, there's no mention of SSE3. -- Bruce Cran