Skip site navigation (1)Skip section navigation (2)
Date:      Mon, 28 Oct 1996 17:33:11 +0900
From:      KATO Takenori <kato@eclogite.eps.nagoya-u.ac.jp>
To:        kato@eclogite.eps.nagoya-u.ac.jp
Cc:        current@freebsd.org
Subject:   Re: patch for Cyrix/Ti 486SLC/DLC CPU bug
Message-ID:  <199610280833.RAA02181@marble.eps.nagoya-u.ac.jp>
In-Reply-To: Your message of "Wed, 11 Sep 1996 20:39:15 %2B0900"
References:  <199609111139.UAA00456@marble.eps.nagoya-u.ac.jp>

next in thread | previous in thread | raw e-mail | index | archive | help
On Wed, 11 Sep 1996 20:39:15 +0900, I said:

>    1)  FPU exception is handled by interrupt gate (machdep.c).
         ^^^^^^^^^^^^^ (page fault exception)
>    2)  The function trap gets fault page address as soon as possible
>        (trap.c).
>    3)  The functions pmap_update_{1,2}pg don't use LMSW instruction
>        but call pmap_update in cpufunc.h (pmap.c).

> 1 and 2 are effective for strange signal 11, and 3 is for page fault.

I got a report from a TI 486DLC2 user about the pmap_update problem
(No. 3).  He installed most recent FreeBSD-current, and his kernel
doesn't panic.

However, he said that page fault related problem still exists, and
interruption should be disabled before getting page fault address on
his machine.  This problem rarely appears on my Cyrix 5x86 box.

I added some debug code which shows rcr2() in the function trap().
When rcr2() returns zero, a process is terminated by signal 11.

----
KATO Takenori <kato@eclogite.eps.nagoya-u.ac.jp>
Dept. Earth Planet. Sci., Nagoya Univ.,  Nagoya, 464-01, Japan
PGP public key: finger kato@eclogite.eps.nagoya-u.ac.jp



Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199610280833.RAA02181>