From owner-freebsd-arm@FreeBSD.ORG Wed Dec 31 11:18:48 2008 Return-Path: Delivered-To: arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 386FE106566C; Wed, 31 Dec 2008 11:18:48 +0000 (UTC) (envelope-from gjb@semihalf.com) Received: from semihalf.com (semihalf.com [206.130.101.55]) by mx1.freebsd.org (Postfix) with ESMTP id ECC058FC0C; Wed, 31 Dec 2008 11:18:47 +0000 (UTC) (envelope-from gjb@semihalf.com) Received: from mail.semihalf.com (mail.semihalf.com [83.15.139.206]) by semihalf.com (8.13.1/8.13.1) with ESMTP id mBVBIk33019336; Wed, 31 Dec 2008 04:18:46 -0700 Message-ID: <495B5531.8040604@semihalf.com> Date: Wed, 31 Dec 2008 12:19:13 +0100 From: Grzegorz Bernacki MIME-Version: 1.0 To: Marcel Moolenaar References: <494BAA90.7000801@semihalf.com> In-Reply-To: Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Cc: arm@freebsd.org, embedded@freebsd.org Subject: Re: Multiple virtual mappings considered harmful on ARM X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 31 Dec 2008 11:18:48 -0000 Marcel Moolenaar wrote: > > On Dec 19, 2008, at 6:07 AM, Grzegorz Bernacki wrote: > >> 2. Root cause. >> The root cause of the problem is additional virtual mapping of read/write >> buffers at cluster read/write (sys/kern/vfs_cluster.c, cluster_rbuild(), >> cluster_wbuild(). Buffers for sequential read/write operation are >> concatenated >> and sent to device as one big buffer. Concatenation of buffers uses >> pmap_qenter(), which puts *additional* mapping in the KVA for physical >> area >> already mapped. For each buffer we extract pages it contains and then >> all the >> pages from all the buffers are mapped into new virtual address of new >> buffer. >> So we end up with at least two virtual addresses for each page. > > Could this also affect I-cache coherency by virtue of not > flushing the D-cache properly before synchronizing the > I-cache, as you mention reading? > I am not sure. I can't think of scenario which might lead to I-cache incoherency. Have you experienced any issues with I-cache which might be related described problem? pozdrawiam, Grzesiek