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Date: Thu, 1 Jun 2006 17:26:18 -0700
From: "Kip Macy" <kip.macy@gmail.com>
To: "John Baldwin" <jhb@freebsd.org>
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References: <200605301926.k4UJQkgt055284@repoman.freebsd.org>
	<200605311657.44921.jhb@freebsd.org>
Cc: Perforce Change Reviews <perforce@freebsd.org>,
	Kip Macy <kmacy@freebsd.org>
Subject: Re: PERFORCE change 98153 for review
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> I'd rather avoid this for now as it will have to be backed out for interrupt
> filters.

I don't know anything about interrupt filters, so please let me know
what you have in mind. The whole of interrupt handling is far too
heavyweight at the moment.


 -Kip

>
> >
> > Affected files ...
> >
> > .. //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#8 edit
> >
> > Differences ...
> >
> > ==== //depot/projects/kmacy_sun4v/src/sys/sun4v/sun4v/intr_machdep.c#8
> (text+ko) ====
> >
> > @@ -205,9 +205,15 @@
> >
> >       ps = intr_disable();
> >       if (vec != -1) {
> > -             intr_vectors[vec].iv_func = ivf;
> > -             intr_vectors[vec].iv_arg = iva;
> > -             intr_vectors[vec].iv_pri = pri;
> > +             if ((char *)intr_vectors[vec].iv_func == (char *)intr_stray_level) {
> > +                     intr_vectors[vec].iv_func = ivf;
> > +                     intr_vectors[vec].iv_arg = iva;
> > +             } else {
> > +                     intr_vectors[vec].iv_func = intr_execute_handlers;
> > +                     intr_vectors[vec].iv_arg = &intr_vectors[vec];
> > +             }
> > +             if (pri > intr_vectors[vec].iv_pri)
> > +                     intr_vectors[vec].iv_pri = pri;
> >               intr_vectors[vec].iv_vec = vec;
> >       }
> >       snprintf(pilname, MAXCOMLEN + 1, "pil%d: %s", pri, pil_names[pri]);
> > @@ -315,8 +321,9 @@
> >       struct intr_vector *iv;
> >       struct intr_event *ie;          /* descriptor for the IRQ */
> >       struct intr_event *orphan;
> > -     int errcode;
> > -
> > +     int errcode, pil;
> > +     iv_func_t *ivf;
> > +     void *iva;
> >       /*
> >        * Work around a race where more than one CPU may be registering
> >        * handlers on the same IRQ at the same time.
> > @@ -347,8 +354,11 @@
> >       if (errcode)
> >               return (errcode);
> >
> > -     intr_setup(flags & INTR_FAST ? PIL_FAST : PIL_ITHREAD, intr_fast, vec,
> > -         intr_execute_handlers, iv);
> > +     pil = (flags & INTR_FAST) ? PIL_FAST : PIL_ITHREAD;
> > +     ivf = (flags & INTR_FAST) ? handler : intr_execute_handlers;
> > +     iva = (flags & INTR_FAST) ? arg : iv;
> > +
> > +     intr_setup(pil, intr_fast, vec, ivf, iva);
> >
> >       intr_stray_count[vec] = 0;
> >
> >
>
> --
> John Baldwin
>