From owner-freebsd-arm@FreeBSD.ORG Mon Jun 29 13:34:45 2009 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 325561065675; Mon, 29 Jun 2009 13:34:45 +0000 (UTC) (envelope-from stas@FreeBSD.org) Received: from mx0.deglitch.com (backbone.deglitch.com [IPv6:2001:16d8:fffb:4::abba]) by mx1.freebsd.org (Postfix) with ESMTP id D48038FC15; Mon, 29 Jun 2009 13:34:44 +0000 (UTC) (envelope-from stas@FreeBSD.org) Received: from stasss.yandex.ru (dhcp170-227-red.yandex.net [95.108.170.227]) by mx0.deglitch.com (Postfix) with ESMTPSA id 218A68FC27; Mon, 29 Jun 2009 17:34:42 +0400 (MSD) Date: Mon, 29 Jun 2009 17:34:38 +0400 From: Stanislav Sedov To: Hans Petter Selasky Message-Id: <20090629173438.75953a18.stas@FreeBSD.org> In-Reply-To: <200906291414.46341.hselasky@c2i.net> References: <200906231035.43096.kosmo@semihalf.com> <200906291337.43635.hselasky@c2i.net> <20090629161011.2a657c4b.stas@FreeBSD.org> <200906291414.46341.hselasky@c2i.net> Organization: The FreeBSD Project X-Mailer: carrier-pigeon Mime-Version: 1.0 Content-Type: multipart/signed; protocol="application/pgp-signature"; micalg="PGP-SHA1"; boundary="Signature=_Mon__29_Jun_2009_17_34_38_+0400_g4SRlaSXA13Hm9UV" Cc: freebsd-arm@freebsd.org, Piotr =?UTF-8?Q?Zi=C4=99cik?= , freebsd-usb@freebsd.org, thompsa@freebsd.org Subject: Re: CPU Cache and busdma usage in USB X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Porting FreeBSD to the StrongARM Processor List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 29 Jun 2009 13:34:45 -0000 --Signature=_Mon__29_Jun_2009_17_34_38_+0400_g4SRlaSXA13Hm9UV Content-Type: text/plain; charset=US-ASCII Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, 29 Jun 2009 14:14:45 +0200 Hans Petter Selasky mentioned: > On Monday 29 June 2009 14:10:11 Stanislav Sedov wrote: > > On Mon, 29 Jun 2009 13:37:41 +0200 > > > > Hans Petter Selasky mentioned: > > > USB is currently _updating_ (!!) the PAGE offset part of "vaddr". If > > > cpu_dcache_inv_range() is called with an address not starting at the > > > cache line what will the cpu_dcache_inv_range() do? Will it skip to t= he > > > next cache line? Or will it completely skip the whole cache sync > > > operation?! > > > > Currently, the address passed to cpu_dcache_inv_range will be rounded up > > to the cache line boundary and the whole line will be invalidated if the > > range requested is smaller than 16KiB. Otherwise, the whole cache will > > be invalidated. >=20 > That maybe explains it, because USB will require rounding down the addres= s and=20 > rounding up the length accordingly, because it uses the=20 > "BUS_DMA_KEEP_PG_OFFSET" flag. > My apologies, it appears that my wording in previous email was incorrect. = The current cpu_dcache_inv_range ARM implementation obviously rounds down the address passed to the cache line boundary and then invalidates all the lines affected. --=20 Stanislav Sedov ST4096-RIPE --Signature=_Mon__29_Jun_2009_17_34_38_+0400_g4SRlaSXA13Hm9UV Content-Type: application/pgp-signature -----BEGIN PGP SIGNATURE----- iQIcBAEBAgAGBQJKSMLyAAoJEKN82nOYvCd0fE8P+wdnphdcU/Rb1JUmrUgMl3nA uo5Qbzx8U0kBckOIkY002zLG22A7nUtTfN0AeBG+HraGRPW6/b+MCWX4Me8YWSSo z3/B74mWe+xScvzZRtIh0gsz3s82H1Sen0F4SxDLX13elee5DueZXpyR80+IYBLq iIiD9vOx07sT3BQRpVObdCAoTgvLpw8Ddsff5uSi45Kur+Bzz3A/3X+xLADuGSVh A/Q9NXKiE5hXr7w19/9db+yXFl8aKCXYZvokH7BuuYfatyIxMZ8E8BRVXb2XRspH z6bYSzBPauzdgNKI4AMl7PB+Fc13bGvLOxzCk2YKBU4IAYZAZwYVXFwSQn7jDYXM XbVvLbsYPnL/JZlpTgm3pNvXdcaacqoQiO2U6YI4ggKEkUatMMgV1glFHtVIbwl+ gcG5vQ5U7EzfEKv5loVxL2mPyUH/Afdws2Y3781xX/c4BYGISMCx034qicpxNd+X 2ePRbPcDS8NmzyUV2fHZq279VFeNVzf6HPaeM0g6EtoILAG9Sk10+LV2nbvqYGwk Yco5WG8wjgGH5avvR3HjNJjVdCz4iHU80LzUPRrutG+ttA5MJUhdMnatnu1Nrxup Qlg7Kv10Dr61fjUHr01+KeuNnEHxFIxps+yg3BlvDL9DrZqJjdhfrrI3/BcMovlV KNaO9AT3+i37AWIcc+7Q =sM7C -----END PGP SIGNATURE----- --Signature=_Mon__29_Jun_2009_17_34_38_+0400_g4SRlaSXA13Hm9UV--