From owner-svn-src-all@freebsd.org Tue Sep 20 11:11:07 2016 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id D4923BE2905; Tue, 20 Sep 2016 11:11:07 +0000 (UTC) (envelope-from wma@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 97C9CE81; Tue, 20 Sep 2016 11:11:07 +0000 (UTC) (envelope-from wma@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id u8KBB6vG065884; Tue, 20 Sep 2016 11:11:06 GMT (envelope-from wma@FreeBSD.org) Received: (from wma@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id u8KBB6S8065878; Tue, 20 Sep 2016 11:11:06 GMT (envelope-from wma@FreeBSD.org) Message-Id: <201609201111.u8KBB6S8065878@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: wma set sender to wma@FreeBSD.org using -f From: Wojciech Macek Date: Tue, 20 Sep 2016 11:11:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r306021 - in head/sys: arm/annapurna/alpine arm/conf arm64/conf boot/fdt/dts/arm conf X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 20 Sep 2016 11:11:07 -0000 Author: wma Date: Tue Sep 20 11:11:06 2016 New Revision: 306021 URL: https://svnweb.freebsd.org/changeset/base/306021 Log: Add driver for PCIe root complex on Annapurna Alpine platform. The driver subclasses pci-host-generic and additionally performs configuration of vendor-specific PCIe registers. Obtained from: Semihalf Submitted by: Michal Stanek Sponsored by: Annapurna Labs Reviewed by: wma Differential Revision: https://reviews.freebsd.org/D7571 Added: head/sys/arm/annapurna/alpine/alpine_pci.c (contents, props changed) Modified: head/sys/arm/conf/ALPINE head/sys/arm64/conf/GENERIC head/sys/boot/fdt/dts/arm/annapurna-alpine.dts head/sys/conf/files.arm head/sys/conf/files.arm64 Added: head/sys/arm/annapurna/alpine/alpine_pci.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/arm/annapurna/alpine/alpine_pci.c Tue Sep 20 11:11:06 2016 (r306021) @@ -0,0 +1,158 @@ +/*- + * Copyright (c) 2015,2016 Annapurna Labs Ltd. and affiliates + * All rights reserved. + * + * Developed by Semihalf. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Alpine PCI/PCI-Express controller driver. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include + +#include "pcib_if.h" + +#include "contrib/alpine-hal/al_hal_unit_adapter_regs.h" +#include "contrib/alpine-hal/al_hal_pcie.h" +#include "contrib/alpine-hal/al_hal_pcie_axi_reg.h" + +#define ANNAPURNA_VENDOR_ID 0x1c36 + +/* Forward prototypes */ +static int al_pcib_probe(device_t); +static int al_pcib_attach(device_t); +static void al_pcib_fixup(device_t); + +static struct ofw_compat_data compat_data[] = { + {"annapurna-labs,al-internal-pcie", true}, + {"annapurna-labs,alpine-internal-pcie", true}, + {NULL, false} +}; + +/* + * Bus interface definitions. + */ +static device_method_t al_pcib_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, al_pcib_probe), + DEVMETHOD(device_attach, al_pcib_attach), + + DEVMETHOD_END +}; + +DEFINE_CLASS_1(pcib, al_pcib_driver, al_pcib_methods, + sizeof(struct generic_pcie_softc), generic_pcie_driver); + +static devclass_t anpa_pcib_devclass; + +DRIVER_MODULE(alpine_pcib, simplebus, al_pcib_driver, anpa_pcib_devclass, 0, 0); +DRIVER_MODULE(alpine_pcib, ofwbus, al_pcib_driver, anpa_pcib_devclass, 0, 0); + +static int +al_pcib_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) + return (ENXIO); + + device_set_desc(dev, + "Annapurna-Labs Integrated Internal PCI-E Controller"); + return (BUS_PROBE_DEFAULT); +} + +static int +al_pcib_attach(device_t dev) +{ + int rv; + + rv = pci_host_generic_attach(dev); + + /* Annapurna quirk: configure vendor-specific registers */ + if (rv == 0) + al_pcib_fixup(dev); + + return (rv); +} + +static void +al_pcib_fixup(device_t dev) +{ + uint32_t val; + uint16_t vid; + uint8_t hdrtype; + int bus, slot, func, maxfunc; + + /* Fixup is only needed on bus 0 */ + bus = 0; + for (slot = 0; slot <= PCI_SLOTMAX; slot++) { + maxfunc = 0; + for (func = 0; func <= maxfunc; func++) { + hdrtype = PCIB_READ_CONFIG(dev, bus, slot, func, + PCIR_HDRTYPE, 1); + + if ((hdrtype & PCIM_HDRTYPE) > PCI_MAXHDRTYPE) + continue; + + if (func == 0 && (hdrtype & PCIM_MFDEV) != 0) + maxfunc = PCI_FUNCMAX; + + vid = PCIB_READ_CONFIG(dev, bus, slot, func, + PCIR_VENDOR, 2); + if (vid == ANNAPURNA_VENDOR_ID) { + val = PCIB_READ_CONFIG(dev, bus, slot, func, + AL_PCI_AXI_CFG_AND_CTR_0, 4); + val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_2_PF_VEC_PH_VEC_OVRD_FROM_AXUSER_MASK; + PCIB_WRITE_CONFIG(dev, bus, slot, func, + AL_PCI_AXI_CFG_AND_CTR_0, val, 4); + + val = PCIB_READ_CONFIG(dev, bus, slot, func, + AL_PCI_APP_CONTROL, 4); + val &= ~0xffff; + val |= PCIE_AXI_PF_AXI_ATTR_OVRD_FUNC_CTRL_4_PF_VEC_MEM_ADDR54_63_SEL_TGTID_MASK; + PCIB_WRITE_CONFIG(dev, bus, slot, func, + AL_PCI_APP_CONTROL, val, 4); + } + } + } +} Modified: head/sys/arm/conf/ALPINE ============================================================================== --- head/sys/arm/conf/ALPINE Tue Sep 20 09:38:07 2016 (r306020) +++ head/sys/arm/conf/ALPINE Tue Sep 20 11:11:06 2016 (r306021) @@ -60,6 +60,11 @@ device ses # Enclosure Services (SES a # Serial ports device uart +# PCI/PCIE +device pci +device pci_host_generic +device al_pci # Annapurna Alpine PCI-E + # Ethernet device ether device mii Modified: head/sys/arm64/conf/GENERIC ============================================================================== --- head/sys/arm64/conf/GENERIC Tue Sep 20 09:38:07 2016 (r306020) +++ head/sys/arm64/conf/GENERIC Tue Sep 20 11:11:06 2016 (r306021) @@ -105,6 +105,7 @@ device cpufreq # Bus drivers device pci +device al_pci # Annapurna Alpine PCI-E options PCI_HP # PCI-Express native HotPlug options PCI_IOV # PCI SR-IOV support Modified: head/sys/boot/fdt/dts/arm/annapurna-alpine.dts ============================================================================== --- head/sys/boot/fdt/dts/arm/annapurna-alpine.dts Tue Sep 20 09:38:07 2016 (r306020) +++ head/sys/boot/fdt/dts/arm/annapurna-alpine.dts Tue Sep 20 11:11:06 2016 (r306021) @@ -175,6 +175,7 @@ device_type = "pci"; #size-cells = <2>; #address-cells = <3>; + reg = <0xfbc00000 0x100000>; interrupt-parent = <&MPIC>; interrupt-map-mask = <0xf800 0 0 7>; interrupt-map = <0x3000 0 0 1 &MPIC 0 32 4>, // USB adapter Modified: head/sys/conf/files.arm ============================================================================== --- head/sys/conf/files.arm Tue Sep 20 09:38:07 2016 (r306020) +++ head/sys/conf/files.arm Tue Sep 20 11:11:06 2016 (r306021) @@ -13,6 +13,7 @@ cloudabi32_vdso_blob.o optional compat_ # arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt +arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/arm/autoconf.c standard arm/arm/bcopy_page.S standard arm/arm/bcopyinout.S standard Modified: head/sys/conf/files.arm64 ============================================================================== --- head/sys/conf/files.arm64 Tue Sep 20 09:38:07 2016 (r306020) +++ head/sys/conf/files.arm64 Tue Sep 20 11:11:06 2016 (r306021) @@ -40,6 +40,7 @@ arm/allwinner/clk/aw_usbclk.c optional a arm/allwinner/if_awg.c optional awg arm/annapurna/alpine/alpine_ccu.c optional al_ccu fdt arm/annapurna/alpine/alpine_nb_service.c optional al_nb_service fdt +arm/annapurna/alpine/alpine_pci.c optional al_pci fdt arm/arm/generic_timer.c standard arm/arm/gic.c standard arm/arm/gic_fdt.c optional fdt