From owner-freebsd-current@FreeBSD.ORG Wed Feb 18 20:00:31 2009 Return-Path: Delivered-To: current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id B72881065673 for ; Wed, 18 Feb 2009 20:00:31 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from mail.terabit.net.ua (mail.terabit.net.ua [195.137.202.147]) by mx1.freebsd.org (Postfix) with ESMTP id 4C7EF8FC15 for ; Wed, 18 Feb 2009 20:00:31 +0000 (UTC) (envelope-from kostikbel@gmail.com) Received: from skuns.zoral.com.ua ([91.193.166.194] helo=mail.zoral.com.ua) by mail.terabit.net.ua with esmtps (TLSv1:AES256-SHA:256) (Exim 4.63 (FreeBSD)) (envelope-from ) id 1LZsaq-000Ne7-2O; Wed, 18 Feb 2009 22:00:28 +0200 Received: from deviant.kiev.zoral.com.ua (root@deviant.kiev.zoral.com.ua [10.1.1.148]) by mail.zoral.com.ua (8.14.2/8.14.2) with ESMTP id n1IK0N4t065336 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 18 Feb 2009 22:00:24 +0200 (EET) (envelope-from kostikbel@gmail.com) Received: from deviant.kiev.zoral.com.ua (kostik@localhost [127.0.0.1]) by deviant.kiev.zoral.com.ua (8.14.3/8.14.3) with ESMTP id n1IK0NrS094763; Wed, 18 Feb 2009 22:00:23 +0200 (EET) (envelope-from kostikbel@gmail.com) Received: (from kostik@localhost) by deviant.kiev.zoral.com.ua (8.14.3/8.14.3/Submit) id n1IK0NC4094762; Wed, 18 Feb 2009 22:00:23 +0200 (EET) (envelope-from kostikbel@gmail.com) X-Authentication-Warning: deviant.kiev.zoral.com.ua: kostik set sender to kostikbel@gmail.com using -f Date: Wed, 18 Feb 2009 22:00:23 +0200 From: Kostik Belousov To: Marcel Moolenaar Message-ID: <20090218200023.GU41617@deviant.kiev.zoral.com.ua> References: <4CB77F1D-4235-47D8-B654-1C4F29B6C649@mac.com> <20090217.234216.1276682135.imp@bsdimp.com> <20090217.235826.-1697751865.imp@bsdimp.com> Mime-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha1; protocol="application/pgp-signature"; boundary="eNjIDde0W37E3OQP" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.4.2.3i X-Virus-Scanned: ClamAV version 0.94.2, clamav-milter version 0.94.2 on skuns.kiev.zoral.com.ua X-Virus-Status: Clean X-Spam-Status: No, score=-4.4 required=5.0 tests=ALL_TRUSTED,AWL,BAYES_00 autolearn=ham version=3.2.5 X-Spam-Checker-Version: SpamAssassin 3.2.5 (2008-06-10) on skuns.kiev.zoral.com.ua X-Virus-Scanned: mail.terabit.net.ua 1LZsaq-000Ne7-2O 51d45eccd875aacf2d71f4555f4f2809 X-Terabit: YES Cc: mips@freebsd.org, tinderbox@freebsd.org, "M. Warner Losh" , current@freebsd.org Subject: Re: [head tinderbox] failure on mips/mips X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 18 Feb 2009 20:00:32 -0000 --eNjIDde0W37E3OQP Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 18, 2009 at 10:19:34AM -0800, Marcel Moolenaar wrote: >=20 > On Feb 17, 2009, at 10:58 PM, M. Warner Losh wrote: >=20 > >In message: > > Marcel Moolenaar writes: > >: > >: On Feb 17, 2009, at 10:42 PM, M. Warner Losh wrote: > >: > >: > : A safer approach is to mark ifi_epoch as packed or put =20 > >differently, > >: > : define time_t as a 64-bit integral with 32-bit alignment. This =20 > >can > >: > : avoid a lot of unexpected internal padding as well (e.g. struct > >: > : timeval). > >: > > >: > Marking it as packed won't help. If the elements aren't properly > >: > aligned, gcc won't access multi-word entities properly. It might > >: > eliminate the warning, but it will break at runtime. > >: > >: But GCC will use a pair of 32-bit loads and/or stores to > >: access the 64-bit integral in that case. There should be > >: no runtime breakage. You only do this for n32 of course. > > > >Why only n32? Registers are still 64-bit in n32. >=20 > I think that's the problem. With registers still 64-bit, MIPS > n32 isn't really behaving like a 32-bit machine in the case of > 64-bit accesses. It's that aspect you want to tweak. So, if > you give all 64-bit integrals an alignment of 4 bytes, then > GCC will use a pair of 32-bit loads and stores (just like, > say, powerpc) and you don't run into the alignment problems > where all of a sudden a data structure gets 8-byte alignment, > triggers warnings, and we try to correct it with kluges. >=20 > For MIPS n64 things are like any other LP64 architecture, so > you don't have to tweak anything. >=20 > In other words: by tweaking the alignment of 64-bit types in > n32, you prohibit GCC from using the 64-bit capabilities of > the processor and MIPS isn't so weird anymore. >=20 > NOTE: On ARM, GCC aligns structures to a 4-byte boundary by > default. This has caused us problems and instead of fixing > the default behaviour of the compiler, we slammed __packed > onto structures. If we had changed the default behaviour of > the compiler, then all structures would be naturally aligned > and we would be able to use the half-word memory accesses > that newer ARM processors have. No, we __packed the lot and > created a big performance bottleneck because now we can only > use byte-wise memory accesses. > What was done for performance (default alignment of 4-bytes > for structures), was turned into a huge pessimisation by us > compensating with __packed. We have more optimal code if > the compiler aligns structures on their natural boundary! >=20 > The point being that programmers *do* code with certain > assumptions and as soon as those assumptions don't hold on > a platform, you end up worse off. My thoughts for MIPS n32 > are to make it behave like any "normal" 32-bit strong- > alignment platform to avoid 1) a large number of runtime > alignment faults -- which are a bigger performance bottleneck > than forcing 64-bit integrals to be accessed with 2 32-bit > accesses and 2) avoid further abuse of __packed, which turns > all accesses in a series of byte-wise accesses. >=20 > At Juniper I changed the ARM compiler default by adding: > -mstructure-size-boundary=3D8 >=20 > That made life a *lot* simpler and performance hasn't been > sacrificed. >=20 > Just an explanation of where I'm coming from... I have a question. All architectures I had a slightest interest in, included the required alignment of types into the ABI specification. This is true at least for i386. amd64, sparc v8 and v9, and HP-PA 1.1 and 2.0. Is MIPS different in this aspect ? --eNjIDde0W37E3OQP Content-Type: application/pgp-signature Content-Disposition: inline -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.9 (FreeBSD) iEYEARECAAYFAkmcaNYACgkQC3+MBN1Mb4iwHQCdEFcZiY7fFPfYKjvou23tkeng hWcAoI6GzgOthcWUAOzx09gY3wy6p/DL =x3VL -----END PGP SIGNATURE----- --eNjIDde0W37E3OQP--