Date: Thu, 14 Jul 2011 10:31:39 +0000 (UTC) From: "Jayachandran C." <jchandra@FreeBSD.org> To: src-committers@freebsd.org, svn-src-user@freebsd.org Subject: svn commit: r224007 - in user/jchandra/mips-xlp-support/sys: conf mips/conf mips/include mips/mips mips/nlm Message-ID: <201107141031.p6EAVdbd024327@svn.freebsd.org>
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Author: jchandra Date: Thu Jul 14 10:31:38 2011 New Revision: 224007 URL: http://svn.freebsd.org/changeset/base/224007 Log: MIPS changes and conf files for XLP CPU_NLM added to XLP family Added: user/jchandra/mips-xlp-support/sys/mips/conf/XLP user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 user/jchandra/mips-xlp-support/sys/mips/conf/XLPN32 Modified: user/jchandra/mips-xlp-support/sys/conf/options.mips user/jchandra/mips-xlp-support/sys/mips/include/bus.h user/jchandra/mips-xlp-support/sys/mips/include/cpufunc.h user/jchandra/mips-xlp-support/sys/mips/include/intr_machdep.h user/jchandra/mips-xlp-support/sys/mips/mips/cache.c user/jchandra/mips-xlp-support/sys/mips/mips/cache_mipsNN.c user/jchandra/mips-xlp-support/sys/mips/mips/cpu.c user/jchandra/mips-xlp-support/sys/mips/mips/exception.S user/jchandra/mips-xlp-support/sys/mips/mips/locore.S user/jchandra/mips-xlp-support/sys/mips/mips/machdep.c user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c user/jchandra/mips-xlp-support/sys/mips/nlm/std.xlp user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c Modified: user/jchandra/mips-xlp-support/sys/conf/options.mips ============================================================================== --- user/jchandra/mips-xlp-support/sys/conf/options.mips Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/conf/options.mips Thu Jul 14 10:31:38 2011 (r224007) @@ -36,6 +36,7 @@ CPU_HAVEFPU opt_global.h CPU_SB1 opt_global.h CPU_CNMIPS opt_global.h CPU_RMI opt_global.h +CPU_NLM opt_global.h ISA_MIPS1 opt_cputype.h ISA_MIPS3 opt_cputype.h Added: user/jchandra/mips-xlp-support/sys/mips/conf/XLP ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/conf/XLP Thu Jul 14 10:31:38 2011 (r224007) @@ -0,0 +1,93 @@ +# XLP -- Generic kernel configuration file for FreeBSD/mips +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD: head/sys/mips/conf/XLR 215270 2010-11-13 22:34:12Z imp $ + +machine mips mipseb +ident XLP + +options ISA_MIPS32 +makeoptions KERNLOADADDR=0x80100000 + +include "../nlm/std.xlp" +makeoptions MODULES_OVERRIDE="" +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +#profile 2 +makeoptions TRAMPLOADADDR=0xffffffff85000000 +makeoptions TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64" + +options SCHED_ULE # ULE scheduler +#options VERBOSE_SYSINIT +#options SCHED_4BSD # 4BSD scheduler +options SMP +options PREEMPTION # Enable kernel thread preemption +#options FULL_PREEMPTION # Enable kernel thread preemption +options INET # InterNETworking +options INET6 # IPv6 communications protocols +options FFS # Berkeley Fast Filesystem +#options SOFTUPDATES # Enable FFS soft updates support +options UFS_ACL # Support for access control lists +options UFS_DIRHASH # Improve performance on big directories +options NFSCL +options NFS_ROOT +options MSDOSFS #MSDOS Filesystem +# +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=nlge0 +#options BOOTP_COMPAT +#options ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\" +# +options MD_ROOT # MD is a potential root device +options MD_ROOT_SIZE=27000 +options ROOTDEVNAME=\"ufs:md0\" +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options HZ=1000 +options NO_SWAPPING + +#Debugging options +options KTRACE # ktrace(1) support +options DDB +options KDB +options GDB +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +#options DEADLKRES #Enable the deadlock resolver +#options INVARIANTS #Enable calls of extra sanity checking +#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options KTR # ktr(4) and ktrdump(8) support +#options KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC) +#options KTR_ENTRIES=131072 +#options LOCK_DEBUG +#options LOCK_PROFILING + + +# Pseudo +device loop +device random +device md +device pty +device bpf + +# UART +device uart + +# Network +device ether Added: user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/conf/XLP64 Thu Jul 14 10:31:38 2011 (r224007) @@ -0,0 +1,95 @@ +# XLP64 -- Generic kernel configuration file for FreeBSD/mips +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD: head/sys/mips/conf/XLR 215270 2010-11-13 22:34:12Z imp $ + +machine mips mips64eb +ident XLP64 + +options ISA_MIPS64 +makeoptions ARCH_FLAGS="-march=mips64 -mabi=64" +makeoptions KERNLOADADDR=0xffffffff80100000 + +include "../nlm/std.xlp" + +makeoptions MODULES_OVERRIDE="" +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +#profile 2 +makeoptions TRAMPLOADADDR=0xffffffff85000000 +makeoptions TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64" + +options SCHED_ULE # ULE scheduler +#options VERBOSE_SYSINIT +#options SCHED_4BSD # 4BSD scheduler +options SMP +options PREEMPTION # Enable kernel thread preemption +#options FULL_PREEMPTION # Enable kernel thread preemption +options INET # InterNETworking +options INET6 # IPv6 communications protocols +options FFS # Berkeley Fast Filesystem +#options SOFTUPDATES # Enable FFS soft updates support +options UFS_ACL # Support for access control lists +options UFS_DIRHASH # Improve performance on big directories +options NFSCL +options NFS_ROOT +options MSDOSFS #MSDOS Filesystem +# +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=nlge0 +#options BOOTP_COMPAT +#options ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\" +# +options MD_ROOT # MD is a potential root device +options MD_ROOT_SIZE=27000 +options ROOTDEVNAME=\"ufs:md0\" +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options HZ=1000 +options NO_SWAPPING + +#Debugging options +options KTRACE # ktrace(1) support +options DDB +options KDB +options GDB +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +#options DEADLKRES #Enable the deadlock resolver +#options INVARIANTS #Enable calls of extra sanity checking +#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options KTR # ktr(4) and ktrdump(8) support +#options KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC) +#options KTR_ENTRIES=131072 +#options LOCK_DEBUG +#options LOCK_PROFILING + + +# Pseudo +device loop +device random +device md +device pty +device bpf + +# UART +device uart + +# Network +device ether Added: user/jchandra/mips-xlp-support/sys/mips/conf/XLPN32 ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ user/jchandra/mips-xlp-support/sys/mips/conf/XLPN32 Thu Jul 14 10:31:38 2011 (r224007) @@ -0,0 +1,94 @@ +# XLPN32 -- Generic kernel configuration file for FreeBSD/mips +# +# For more information on this file, please read the handbook section on +# Kernel Configuration Files: +# +# http://www.FreeBSD.org/doc/en_US.ISO8859-1/books/handbook/kernelconfig-config.html +# +# The handbook is also available locally in /usr/share/doc/handbook +# if you've installed the doc distribution, otherwise always see the +# FreeBSD World Wide Web server (http://www.FreeBSD.org/) for the +# latest information. +# +# An exhaustive list of options and more detailed explanations of the +# device lines is also present in the ../../conf/NOTES and NOTES files. +# If you are in doubt as to the purpose or necessity of a line, check first +# in NOTES. +# +# $FreeBSD: head/sys/mips/conf/XLR 215270 2010-11-13 22:34:12Z imp $ + +machine mips mipsn32eb +ident XLPN32 + +options ISA_MIPS64 +makeoptions ARCH_FLAGS="-march=mips64 -mabi=n32" +makeoptions KERNLOADADDR=0x80100000 + +include "../nlm/std.xlp" +makeoptions MODULES_OVERRIDE="" +makeoptions DEBUG=-g # Build kernel with gdb(1) debug symbols +#profile 2 +makeoptions TRAMPLOADADDR=0xffffffff85000000 +makeoptions TRAMP_ARCH_FLAGS="-mabi=64 -march=mips64" + +options SCHED_ULE # ULE scheduler +#options VERBOSE_SYSINIT +#options SCHED_4BSD # 4BSD scheduler +options SMP +options PREEMPTION # Enable kernel thread preemption +#options FULL_PREEMPTION # Enable kernel thread preemption +options INET # InterNETworking +options INET6 # IPv6 communications protocols +options FFS # Berkeley Fast Filesystem +#options SOFTUPDATES # Enable FFS soft updates support +options UFS_ACL # Support for access control lists +options UFS_DIRHASH # Improve performance on big directories +options NFSCL +options NFS_ROOT +options MSDOSFS #MSDOS Filesystem +# +#options BOOTP +#options BOOTP_NFSROOT +#options BOOTP_NFSV3 +#options BOOTP_WIRED_TO=nlge0 +#options BOOTP_COMPAT +#options ROOTDEVNAME=\"nfs:10.1.1.8:/usr/extra/nfsroot\" +# +options MD_ROOT # MD is a potential root device +options MD_ROOT_SIZE=27000 +options ROOTDEVNAME=\"ufs:md0\" +options _KPOSIX_PRIORITY_SCHEDULING # POSIX P1003_1B real-time extensions +options HZ=1000 +options NO_SWAPPING + +#Debugging options +options KTRACE # ktrace(1) support +options DDB +options KDB +options GDB +options BREAK_TO_DEBUGGER +options ALT_BREAK_TO_DEBUGGER +#options DEADLKRES #Enable the deadlock resolver +#options INVARIANTS #Enable calls of extra sanity checking +#options INVARIANT_SUPPORT #Extra sanity checks of internal structures, required by INVARIANTS +#options WITNESS #Enable checks to detect deadlocks and cycles +#options WITNESS_SKIPSPIN #Don't run witness on spinlocks for speed +#options KTR # ktr(4) and ktrdump(8) support +#options KTR_COMPILE=(KTR_LOCK|KTR_PROC|KTR_INTR|KTR_CALLOUT|KTR_UMA|KTR_SYSC) +#options KTR_ENTRIES=131072 +#options LOCK_DEBUG +#options LOCK_PROFILING + + +# Pseudo +device loop +device random +device md +device pty +device bpf + +# UART +device uart + +# Network +device ether Modified: user/jchandra/mips-xlp-support/sys/mips/include/bus.h ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/include/bus.h Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/include/bus.h Thu Jul 14 10:31:38 2011 (r224007) @@ -721,7 +721,7 @@ void __bs_c(f,_bs_c_8) (void *t, bus_spa DECLARE_BUS_SPACE_PROTOTYPES(generic); extern bus_space_tag_t mips_bus_space_generic; /* Special bus space for RMI processors */ -#ifdef CPU_RMI +#if defined(CPU_RMI) || defined (CPU_NLM) extern bus_space_tag_t rmi_bus_space; extern bus_space_tag_t rmi_pci_bus_space; #endif Modified: user/jchandra/mips-xlp-support/sys/mips/include/cpufunc.h ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/include/cpufunc.h Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/include/cpufunc.h Thu Jul 14 10:31:38 2011 (r224007) @@ -254,6 +254,10 @@ MIPS_RW32_COP0_SEL(config3, MIPS_COP_0_C #ifdef CPU_CNMIPS MIPS_RW32_COP0_SEL(config4, MIPS_COP_0_CONFIG, 4); #endif +#ifdef CPU_NLM +MIPS_RW32_COP0_SEL(config6, MIPS_COP_0_CONFIG, 6); +MIPS_RW32_COP0_SEL(config7, MIPS_COP_0_CONFIG, 7); +#endif MIPS_RW32_COP0(count, MIPS_COP_0_COUNT); MIPS_RW32_COP0(index, MIPS_COP_0_TLB_INDEX); MIPS_RW32_COP0(wired, MIPS_COP_0_TLB_WIRED); Modified: user/jchandra/mips-xlp-support/sys/mips/include/intr_machdep.h ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/include/intr_machdep.h Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/include/intr_machdep.h Thu Jul 14 10:31:38 2011 (r224007) @@ -29,7 +29,7 @@ #ifndef _MACHINE_INTR_MACHDEP_H_ #define _MACHINE_INTR_MACHDEP_H_ -#ifdef CPU_RMI +#if defined(CPU_RMI) || defined(CPU_NLM) #define XLR_MAX_INTR 64 #else #define NHARD_IRQS 6 Modified: user/jchandra/mips-xlp-support/sys/mips/mips/cache.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/cache.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/cache.c Thu Jul 14 10:31:38 2011 (r224007) @@ -80,6 +80,11 @@ __FBSDID("$FreeBSD$"); struct mips_cache_ops mips_cache_ops; +static void +cache_noop(vm_offset_t va, vm_size_t size) +{ +} + void mips_config_cache(struct mips_cpuinfo * cpuinfo) { @@ -94,8 +99,13 @@ mips_config_cache(struct mips_cpuinfo * break; case 32: mips_cache_ops.mco_icache_sync_all = mipsNN_icache_sync_all_32; +#ifdef CPU_NLM + mips_cache_ops.mco_icache_sync_range = + mipsNN_icache_sync_range_index_32; +#else mips_cache_ops.mco_icache_sync_range = mipsNN_icache_sync_range_32; +#endif mips_cache_ops.mco_icache_sync_range_index = mipsNN_icache_sync_range_index_32; break; @@ -143,16 +153,26 @@ mips_config_cache(struct mips_cpuinfo * mips_cache_ops.mco_pdcache_wbinv_all = mips_cache_ops.mco_intern_pdcache_wbinv_all = mipsNN_pdcache_wbinv_all_32; +#ifdef CPU_NLM + mips_cache_ops.mco_pdcache_wbinv_range = + mipsNN_pdcache_wbinv_range_index_32; +#else mips_cache_ops.mco_pdcache_wbinv_range = mipsNN_pdcache_wbinv_range_32; +#endif mips_cache_ops.mco_pdcache_wbinv_range_index = mips_cache_ops.mco_intern_pdcache_wbinv_range_index = mipsNN_pdcache_wbinv_range_index_32; mips_cache_ops.mco_pdcache_inv_range = mipsNN_pdcache_inv_range_32; +#if defined(CPU_RMI) || defined(CPU_NLM) + mips_cache_ops.mco_pdcache_wb_range = + mips_cache_ops.mco_intern_pdcache_wb_range = cache_noop; +#else mips_cache_ops.mco_pdcache_wb_range = mips_cache_ops.mco_intern_pdcache_wb_range = mipsNN_pdcache_wb_range_32; +#endif break; #ifdef CPU_CNMIPS case 128: Modified: user/jchandra/mips-xlp-support/sys/mips/mips/cache_mipsNN.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/cache_mipsNN.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/cache_mipsNN.c Thu Jul 14 10:31:38 2011 (r224007) @@ -54,15 +54,36 @@ __FBSDID("$FreeBSD$"); #define round_line32(x) (((x) + 31) & ~31) #define trunc_line32(x) ((x) & ~31) +#if defined(CPU_NLM) +static __inline void +xlp_sync(void) +{ + __asm __volatile ( + ".set push \n" + ".set noreorder \n" + ".set mips64 \n" + "dla $8, 1f \n" + "/* jr.hb $8 */ \n" + ".word 0x1000408 \n" + "nop \n" + "1: nop \n" + ".set pop \n" + : : : "$8"); +} +#endif -#ifdef SB1250_PASS1 +#if defined(SB1250_PASS1) #define SYNC __asm volatile("sync; sync") +#elif defined(CPU_NLM) +#define SYNC xlp_sync() #else #define SYNC __asm volatile("sync") #endif -#ifdef CPU_CNMIPS +#if defined(CPU_CNMIPS) #define SYNCI mips_sync_icache(); +#elif defined(CPU_NLM) +#define SYNCI xlp_sync() #else #define SYNCI #endif Modified: user/jchandra/mips-xlp-support/sys/mips/mips/cpu.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/cpu.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/cpu.c Thu Jul 14 10:31:38 2011 (r224007) @@ -101,8 +101,14 @@ mips_get_identity(struct mips_cpuinfo *c /* Learn TLB size and L1 cache geometry. */ cfg1 = mips_rd_config1(); +#ifndef CPU_NLM cpuinfo->tlb_nentries = ((cfg1 & MIPS_CONFIG1_TLBSZ_MASK) >> MIPS_CONFIG1_TLBSZ_SHIFT) + 1; +#else + /* Account for Extended TLB entries in XLP */ + tmp = mips_rd_config6(); + cpuinfo->tlb_nentries = ((tmp >> 16) & 0xffff) + 1; +#endif /* Add extended TLB size information from config4. */ #if defined(CPU_CNMIPS) Modified: user/jchandra/mips-xlp-support/sys/mips/mips/exception.S ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/exception.S Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/exception.S Thu Jul 14 10:31:38 2011 (r224007) @@ -228,7 +228,7 @@ SlowFault: and a0, a0, a2 ; \ mtc0 a0, MIPS_COP_0_STATUS ; \ ITLBNOPFIX -#elif defined(CPU_RMI) +#elif defined(CPU_RMI) || defined(CPU_NLM) #define CLEAR_STATUS \ mfc0 a0, MIPS_COP_0_STATUS ;\ li a2, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) ; \ @@ -470,7 +470,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAM and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS3_SR_KSU_MASK | MIPS_SR_INT_IE) #if defined(CPU_CNMIPS) or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX) -#elif defined(CPU_RMI) +#elif defined(CPU_RMI) || defined(CPU_NLM) or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) #endif mtc0 t0, MIPS_COP_0_STATUS @@ -688,7 +688,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, r and t0, a0, ~(MIPS_SR_COP_1_BIT | MIPS_SR_EXL | MIPS_SR_INT_IE | MIPS3_SR_KSU_MASK) #ifdef CPU_CNMIPS or t0, t0, (MIPS_SR_KX | MIPS_SR_SX | MIPS_SR_UX | MIPS_SR_PX) -#elif defined(CPU_RMI) +#elif defined(CPU_RMI) || defined(CPU_NLM) or t0, t0, (MIPS_SR_KX | MIPS_SR_UX | MIPS_SR_COP_2_BIT) #endif mtc0 t0, MIPS_COP_0_STATUS Modified: user/jchandra/mips-xlp-support/sys/mips/mips/locore.S ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/locore.S Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/locore.S Thu Jul 14 10:31:38 2011 (r224007) @@ -99,7 +99,7 @@ VECTOR(_locore, unknown) /* Reset these bits */ li t0, ~(MIPS_SR_DE | MIPS_SR_SOFT_RESET | MIPS_SR_ERL | MIPS_SR_EXL | MIPS_SR_INT_IE) -#elif defined (CPU_RMI) +#elif defined (CPU_RMI) || defined (CPU_NLM) /* Set these bits */ li t1, (MIPS_SR_COP_2_BIT | MIPS_SR_COP_0_BIT | MIPS_SR_KX | MIPS_SR_UX) Modified: user/jchandra/mips-xlp-support/sys/mips/mips/machdep.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/mips/machdep.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/mips/machdep.c Thu Jul 14 10:31:38 2011 (r224007) @@ -338,7 +338,7 @@ mips_vector_init(void) bcopy(MipsTLBMiss, (void *)MIPS_UTLB_MISS_EXC_VEC, MipsTLBMissEnd - MipsTLBMiss); -#if defined(CPU_CNMIPS) || defined(CPU_RMI) +#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM) /* Fake, but sufficient, for the 32-bit with 64-bit hardware addresses */ bcopy(MipsTLBMiss, (void *)MIPS3_XTLB_MISS_EXC_VEC, MipsTLBMissEnd - MipsTLBMiss); Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/cms.c Thu Jul 14 10:31:38 2011 (r224007) @@ -257,13 +257,14 @@ xlp_handle_msg_vc(int vc, int max_msgs) continue; } he = &msgmap[srcid]; - if(he->action == NULL) { + if(he->action != NULL) + (he->action)(vc, size, code, srcid, &msg, he->arg); +#if 0 /* debug */ + else printf("[%s]: No Handler for message from stn_id=%d," " vc=%d, size=%d, msg0=%jx, dropping message\n", __func__, srcid, vc, size, (uintmax_t)msg.msg[0]); - continue; - } - (he->action)(vc, size, code, srcid, &msg, he->arg); +#endif } return (i); Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/std.xlp ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/std.xlp Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/std.xlp Thu Jul 14 10:31:38 2011 (r224007) @@ -1,12 +1,4 @@ # $FreeBSD$ files "../nlm/files.xlp" -cpu CPU_NLMXLP +cpu CPU_NLM -# -# XXXMIPS: It's a stub, isn't it? -# -#option HW_PAGEWALKER -#option MMU_HASH_MODE # enables hash based lookup into extended TLBs -#option MMU_CLOCK_GATING # enables clock gating on MMU -#option MMU_GLOBAL_MODE # enables global mode of sharing all TLBs with all h/w threads -#option NOFPU Modified: user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c ============================================================================== --- user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c Thu Jul 14 10:09:58 2011 (r224006) +++ user/jchandra/mips-xlp-support/sys/mips/nlm/xlp_machdep.c Thu Jul 14 10:31:38 2011 (r224007) @@ -214,8 +214,7 @@ xlp_parse_mmu_options(void) unsupp: printf("ERROR : Unsupported CPU mask [use 1,2 or 4 threads per core].\n" - "\tcore0 thread mask [%lx], boot cpu mask [%lx]\n" - "\tUsing default, 16 TLB entries per CPU, split mode\n", + "\tcore0 thread mask [%lx], boot cpu mask [%lx].\n", (u_long)core0_thr_mask, (u_long)cpu_map); panic("Invalid CPU mask - halting.\n"); return; @@ -495,8 +494,6 @@ platform_start(__register_t a0 __unused, xlp_pic_init(); mips_timer_init_params(xlp_cpu_frequency, 0); - - printf("Platform specific startup now completes\n"); } void @@ -630,6 +627,7 @@ platform_ipi_intrnum(void) void platform_ipi_send(int cpuid) { + nlm_pic_send_ipi(xlp_pic_base, 0, xlp_cpuid_to_hwtid[cpuid], platform_ipi_intrnum(), 0); }
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