From owner-p4-projects@FreeBSD.ORG Thu Nov 20 13:51:25 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 5040D16A4D0; Thu, 20 Nov 2003 13:51:25 -0800 (PST) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 2AA3216A4CE for ; Thu, 20 Nov 2003 13:51:25 -0800 (PST) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 74D4B43FCB for ; Thu, 20 Nov 2003 13:51:24 -0800 (PST) (envelope-from jhb@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.9/8.12.9) with ESMTP id hAKLpOXJ005453 for ; Thu, 20 Nov 2003 13:51:24 -0800 (PST) (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.9/8.12.9/Submit) id hAKLpNMI005450 for perforce@freebsd.org; Thu, 20 Nov 2003 13:51:23 -0800 (PST) (envelope-from jhb@freebsd.org) Date: Thu, 20 Nov 2003 13:51:23 -0800 (PST) Message-Id: <200311202151.hAKLpNMI005450@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin To: Perforce Change Reviews Subject: PERFORCE change 42836 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 20 Nov 2003 21:51:25 -0000 http://perforce.freebsd.org/chv.cgi?CH=42836 Change 42836 by jhb@jhb_blue on 2003/11/20 13:50:43 Bah. Affected files ... .. //depot/projects/power/sys/amd64/isa/icu.h#2 integrate Differences ... ==== //depot/projects/power/sys/amd64/isa/icu.h#2 (text+ko) ==== @@ -34,7 +34,7 @@ * SUCH DAMAGE. * * from: @(#)icu.h 5.6 (Berkeley) 5/9/91 - * $FreeBSD: src/sys/amd64/isa/icu.h,v 1.28 2003/05/01 01:05:24 peter Exp $ + * $FreeBSD: src/sys/amd64/isa/icu.h,v 1.31 2003/11/17 09:19:12 peter Exp $ */ /* @@ -45,25 +45,7 @@ #ifndef _I386_ISA_ICU_H_ #define _I386_ISA_ICU_H_ -#ifndef LOCORE - /* - * Note: - * Most of the SMP equivilants of the icu macros are coded - * elsewhere in an MP-safe fashion. - * In particular note that the 'imen' variable is opaque. - * DO NOT access imen directly, use INTREN()/INTRDIS(). - */ - -void INTREN(u_int); -void INTRDIS(u_int); - -extern unsigned imen; /* interrupt mask enable */ - -#endif /* LOCORE */ - - -/* * Interrupt enable bits - in normal order of priority (which we change) */ #define IRQ0 0x0001 /* highest priority - timer */ @@ -125,9 +107,9 @@ #define OCW2_R 0x80 /* EOI mode */ /* Operation control word type 3. Bit 3 (0x08) must be set. Even address. */ -#define OCW3_RIS 0x01 -#define OCW3_RR 0x02 -#define OCW3_P 0x04 +#define OCW3_RIS 0x01 /* 1 = read IS, 0 = read IR */ +#define OCW3_RR 0x02 /* register read */ +#define OCW3_P 0x04 /* poll mode command */ /* 0x08 must be 1 to select OCW3 vs OCW2 */ #define OCW3_SEL 0x08 /* must be 1 */ /* 0x10 must be 0 to select OCW3 vs ICW1 */ @@ -139,14 +121,13 @@ */ #define ICU_OFFSET 32 /* 0-31 are processor exceptions */ #define ICU_LEN 16 /* 32-47 are ISA interrupts */ -#define HWI_MASK 0xffff /* bits for h/w interrupts */ -#define NHWI 16 - #define ICU_IMR_OFFSET 1 #define ICU_SLAVEID 2 #define ICU_EOI (OCW2_EOI) /* non-specific EOI */ -#define ICU_SETPRI (OCW2_R | OCW2_SL) /* set rotation priority */ -#define INTRCNT_COUNT (1 + ICU_LEN + 2 * ICU_LEN) +#ifndef LOCORE +void atpic_handle_intr(void *cookie, struct intrframe iframe); +void atpic_startup(void); +#endif #endif /* !_I386_ISA_ICU_H_ */