Date: Mon, 10 May 2021 00:58:50 GMT From: Konstantin Belousov <kib@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org Subject: git: 765f31a86876 - stable/12 - Add Apollo Lake SIO/LPSS UARTs PCI IDs Message-ID: <202105100058.14A0woQb001734@gitrepo.freebsd.org>
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The branch stable/12 has been updated by kib: URL: https://cgit.FreeBSD.org/src/commit/?id=765f31a86876aae85e3ba1da95ea6053720e9b31 commit 765f31a86876aae85e3ba1da95ea6053720e9b31 Author: Jose Luis Duran <jlduran@gmail.com> AuthorDate: 2021-05-02 21:20:25 +0000 Commit: Konstantin Belousov <kib@FreeBSD.org> CommitDate: 2021-05-10 00:58:25 +0000 Add Apollo Lake SIO/LPSS UARTs PCI IDs PR: 255556 (cherry picked from commit 8f1562430fbb83f6cedff6450e1aa1b593e3d7e7) --- sys/dev/uart/uart_bus_pci.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/sys/dev/uart/uart_bus_pci.c b/sys/dev/uart/uart_bus_pci.c index a00b884046c7..4de2299488cf 100644 --- a/sys/dev/uart/uart_bus_pci.c +++ b/sys/dev/uart/uart_bus_pci.c @@ -147,6 +147,14 @@ static const struct pci_id pci_ns8250_ids[] = { { 0x8086, 0x2e17, 0xffff, 0, "4 Series Chipset Serial KT Controller", 0x10 }, { 0x8086, 0x3b67, 0xffff, 0, "5 Series/3400 Series Chipset KT Controller", 0x10 }, +{ 0x8086, 0x5abc, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 0", 0x10, + 24 * DEFAULT_RCLK, 2 }, +{ 0x8086, 0x5abe, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 1", 0x10, + 24 * DEFAULT_RCLK, 2 }, +{ 0x8086, 0x5ac0, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 2", 0x10, + 24 * DEFAULT_RCLK, 2 }, +{ 0x8086, 0x5aee, 0xffff, 0, "Intel Apollo Lake SIO/LPSS UART 3", 0x10, + 24 * DEFAULT_RCLK, 2 }, { 0x8086, 0x8811, 0xffff, 0, "Intel EG20T Serial Port 0", 0x10 }, { 0x8086, 0x8812, 0xffff, 0, "Intel EG20T Serial Port 1", 0x10 }, { 0x8086, 0x8813, 0xffff, 0, "Intel EG20T Serial Port 2", 0x10 },
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